Microelectronic devices, methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices

A packaged microelectronic device comprising:

• a die having a first surface, a second surface opposite to the first surface, and an integrated circuit positioned at least partially between the first and second surfaces;
• a bond-pad positioned at least proximate to the second surface of the die and coupled to the integrated circuit, the bond-pad having a third surface at least generally opposite to the first surface of the die;
• a passage extending completely through the die and the bond-pad from the first surface of the die to the third surface of the bond-pad;
• and
• electrically conductive material disposed in the passage from at least proximate to the first surface of the die to at least proximate to the third surface of the bond-pad.

A microfeature workpiece having a front side and a back side opposite to the front side, the microfeature workpiece comprising:

• a die having an integrated circuit;
• a bond-pad electrically coupled to the integrated circuit;
• and
• a passage extending through the microfeature workpiece from the back side to the front side and passing completely through the die and the bond-pad.

A microelectronic device set comprising:

• a first microelectronic device having:
• a first die with a first integrated circuit and a first bond-pad electrically coupled to the first integrated circuit;
• a passage extending completely through the first die and the first bond-pad;
• and
• a metal fill at least partially disposed in the passage and electrically coupled to the first bond-pad;
• and
• at least a second microelectronic device having a second die with a second integrated circuit and a second bond-pad electrically coupled to the second integrated circuit, wherein the second bond-pad is electrically coupled to the metal fill disposed in the passage of the first microelectronic device.

A packaged microelectronic device comprising:

• a die having a first surface, a second surface opposite to the first surface, and an integrated circuit positioned at least partially between the first and second surfaces;
• a redistribution layer positioned at least proximate to the first surface of the die, the redistribution layer including a conductive line having a first end portion spaced apart from a second end portion;
• a passage extending completely through the die and the first end portion of the conductive line;
• and
• electrically conductive material disposed in the passage, wherein the electrically conductive material extends through the first end portion of the conductive line and is electrically connected to the first end portion of the conductive line.