Package Structure of Semiconductor and Wafer-level Formation Thereof
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsKuo-Pin Yang, Wei-Min Hsiao
Life of this patent
Estimating the term…
Abstract
In wafer-level formation of a package structure of semiconductor, multitudes of conductive connection structures are formed protruded from a transparent substrate. Multitudes of grooves are formed in a semiconductor wafer and an adhesive is filled therein. The wafer and the transparent substrate are jointed in which each of the conductive connection structures are positioned in one of the grooves and exposed outside of another surface of the semiconductor wafer. A package structure is obtained by sawing the wafer and has electrical connection between the signals of the active side and back side through the conductive connection structures.
Claims14
A wafer-level package process comprising:
- providing a substrate, wherein the substrate comprises a plurality of conductive connection structures protruding from the substrate;
- providing a wafer having an active surface and a back surface, wherein the active surface comprises a plurality of grooves thereon;
- forming an adhesive in each of the grooves;
- joining the substrate and the wafer, wherein each conductive connection structure is positioned in each groove and the adhesive;
- removing part of the wafer from the back surface for exposing each of the conductive connection structures;
- forming a compliant layer on the back surface and exposing each of the exposed conductive connection structures;
- forming at least a circuit layer on the compliant layer, wherein the circuit layer contacts the exposed conductive connection structures;
- and
- forming an insulating layer on the circuit layer and exposing part of the circuit layer.
A package structure of semiconductor comprising:
- a substrate;
- a semiconductor device having an active surface and a back surface, wherein the active surface of the semiconductor device faces the substrate;
- a plurality of conductive connection structures disposed between the substrate and the semiconductor device and on the edge of the semiconductor device;
- a compliant layer on the back surface that exposes each conductive connection structure;
- a circuit layer on the compliant layer that contacts each conductive connection structure;
- and
- an insulating layer on the circuit layer that exposes part of the circuit layer.
Dependencies are inferred from the claim text.