Semiconductor device and skew adjusting method
AssigneeFujitsu Limited
InventorsKazuhiko Kikuchi, Masaya Kitagawa, Jun Masuko
Life of this patent
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Abstract
Function circuits composing one function macro are divided and mounted on plural chips, plural internal clock signals having different phases with one another are generated based on a clock signal to be a reference, a phase of a clock signal supplied to the function circuits within the chips is adjusted based on a result of a test operation performed by using a selected internal clock signal, a clock signal with an optimal phase is obtained from among the plural internal clock signals having the different phases with one another, and a skew generated by being divided into the plural chips is adjusted automatically to thereby realize a proper operation of the circuits as a whole.
Claims13
A semiconductor device, in which function circuits composing one function macro are divided and mounted on plural chips, internal clock signals having different phases with one another are generated based on a clock signal to be a reference, one of the generated internal clock signals is selected, and a phase of a clock signal supplied to the function circuits within the chips is adjusted based on a result of a test operation performed by using the selected internal clock signal.
A semiconductor device in which function circuits composing one function macro are divided and mounted on plural chips, comprising:
- a clock generation circuit generating internal clock signals having different phases with one another based on a clock signal to be a reference;
- a clock selection circuit selecting one of the internal clock signals generated by said clock generation circuit;
- and
- a phase adjusting circuit adjusting a phase of a clock signal supplied to the function circuits within the chips based on a result of a test operation performed by using the internal clock signal selected by said clock selection circuit.
A skew adjusting method of a semiconductor device in which function circuits composing one function macro are divided and mounted on plural chips, said skew adjusting method comprising the steps of:
- generating internal clock signals having different phases with one another based on a clock signal to be a reference;
- selecting the generated internal clock signal one by one;
- and
- performing a test operation by using the selected internal clock signal, and adjusting a phase of a clock signal supplied to the function circuits within the chips based on the result of the test operation.
Dependencies are inferred from the claim text.