User configurable commands for flash memory

An apparatus for reconfiguring a received command in a flash memory device comprising a plurality of memory dies, each die having a die address, the apparatus comprising:

• a register for storing a first command comprising the die address, the register comprising a reset input for setting the register contents to a predetermined state;
• indication logic, coupled to the register, for generating an indication signal when the register has stored the first command;
• transfer gate logic for outputting the received command in response to the indication signal;
• and
• a comparator circuit coupled to the register for comparing the received command to the first command and outputting the first command when the received and the first commands are equal.

A memory device comprising:

• a plurality of memory dies, each die comprising a memory array organized into memory blocks and having an apparatus for reconfiguring a received command, the apparatus comprising:
• a register for storing a first command;
• indication logic, coupled to the register, for generating an indication signal when the register has been written to;
• transfer gate logic for blocking the received command in response to the indication signal;
• and
• a comparator circuit, coupled to the register, for comparing the received command to the first command and outputting the first command when the received and the first commands are equal.

A NAND flash memory device comprising:

• a plurality of memory dies, each die comprising:
• a memory array organized into memory blocks including a first memory block for storing boot data;
• and
• control circuitry, coupled to the memory array, that controls operation of the memory die, the control circuitry adapted to execute a process for reconfiguring a received command that includes setting a register content to a predetermined state, loading the boot data into the register, executing the received command if the register content is still in the predetermined state, and executing the register content if the register content is not in the predetermined state and the received command is equal to the register content.

A memory system comprising:

• a processor that generates memory control signals;
• and
• a flash memory device coupled to the processor, the device comprising a plurality of memory dies, each memory die having an apparatus for reconfiguring a received command from the processor, the apparatus comprising:
• a register for storing a first command;
• indication logic, coupled to the register, for generating an indication signal when the register has been altered from a predetermined state;
• transfer gate logic for blocking the received command in response to the indication signal;
• and
• a comparator circuit, coupled to the register, for comparing the received command to the first command and outputting the received command when the received and the first commands are equal.

A method for reconfiguring a command in a memory device comprising a command register, the method comprising:

• receiving a memory command;
• comparing the received memory command with contents of the command register;
• and
• if the received memory command and the contents of the command register contents are not equal, blocking the received memory command from execution.

A method for reconfiguring a command in a flash memory device comprising a command register and a plurality of memory dies, the method comprising:

• generating a register signal in response to the command register being modified;
• receiving a memory command;
• comparing the received memory command with contents of the command register when the register signal indicates that the command register has been modified;
• preventing the received memory command from being executed when the contents of the command register are not equal to the received command;
• and
• executing the received memory command when the contents of the command register are equal to the received command.