Back to results
US 2006/0215427 A1Published application
Circuit for reducing inrush current generated during startup of a switching power supply
AssigneePrinceton Technology Corporation
InventorTu-Hsien Ma
Life of this patent
Estimating the term…
Abstract
A circuit for reducing inrush current generated during startup of a switching power supply, which includes a reference voltage generator, an error amplifier, an oscillator, a sawtooth wave generator, a PWM comparator, an overshoot comparator, an AND gate, a R-S flip-flop, a power MOS switch, and a rectifying and filtering circuit. A division voltage outputted from the rectifying and filtering circuit is fed back to the error amplifier.
Claims2
A circuit for reducing inrush current generated during startup of a switching power supply, comprising:
- a reference voltage generator;
- an error amplifier;
- an oscillator;
- a sawtooth wave generator;
- a PWM comparator;
- an overshoot comparator;
- an AND gate;
- a R-S flip-flop;
- a power MOS switch;
- and
- a rectifying and filtering circuit,
- wherein a division voltage outputted from the rectifying and filtering circuit is fed back to the error amplifier, and the reference voltage generator generates a high reference voltage and a low reference voltage the high reference voltage is inputted to the overshoot comparator, and the low reference voltage is inputted to the error amplifier, and
- wherein the division voltage outputted from the rectifying and filtering circuit is fed back to the error amplifier and the overshoot comparator, an output of the overshoot comparator and an output of the R-S flip-flop are inputted to the AND gate, and an output of the AND gate is inputted to the power MOS switch.
10 more elements
(canceled)
Dependencies are inferred from the claim text.