Power wiring structure and method for a plurality of driver chips on a display panel
OwnerWei-Chung Cheng, Yi-chan Cheninventors
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Abstract
In a power wiring structure and method for a plurality of driver chips on a display panel, the display panel has a panel routing line thereon, each of the driver chips has a power line therewithin, and the power line is connected in parallel to the panel routing line. Due to the parallel connection of the power line and the panel routing line, the power wiring structure has an extremely low resistance, and thereby the power consumption resulted from the power wiring structure is very low.
Claims3
A power wiring structure for a plurality of driver chips on a display panel, comprising:
- a panel routing line on the display panel;
- and
- each of the plurality of driver chips having a power line therewithin connected in parallel to the panel routing line.
A power wiring method for a plurality of driver chips on a display panel, each of the plurality of driver chips having a power line therewithin, the method comprising the steps of:
- selecting a panel routing line on the display panel;
- and
- connecting each of the power lines in parallel to the panel routing line.
Dependencies are inferred from the claim text.