Power switching circuit

A power switching circuit comprising:

• a first P-type transistor and a second P-type transistor connected in series between a first power source and a second power source;
• a gate control circuit including a first resistive element connected between the first power source and the gate of the first P-type transistor, a second resistive element connected between the second power source and the gate of the second P-type transistor, a sixth N-type transistor connected between the gate of the second P-type transistor and an earth potential, a third resistive element, a fourth resistive element, and a seventh N-type transistor connected in series between the first power source and the earth potential, a first operational amplifier of which a normal input terminal is connected to a connection node between the third resistive element and the fourth resistive element, a wire for connecting an inverted input of the first operational amplifier to the second power source, a fifth N-type transistor connected between the gate of the first P-type transistor and the output of the first operational amplifier, a control signal terminal connected to the gate of the fifth N-type transistor, the gate of the sixth n-type transistor, and the gate of the seventh N-type transistor, a first output terminal connected to the gate of the first P-type transistor, and a second output terminal connected to the gate of the second P-type transistor;
• and
• a well-potential control circuit including a first power supply terminal connected to the first power source, a second power supply terminal connected to the second power source, and an output terminal connected to the well of the first P-type transistor and the well of the second P-type transistor,
• wherein the well-potential control circuit outputs a voltage equal to the voltage of the first power source to the output terminal when the voltage of the first power source is higher than the voltage of the second power source, and outputs a voltage equal to the voltage of the second power source when the voltage of the second power source is higher than the voltage of the first power source.

A power switching circuit comprising:

• a ninth P-type transistor and a tenth P-type transistor connected in series between a first power source and a second power source;
• an eleventh P-type transistor connected between a connection node between the ninth P-type transistor and the tenth P-type transistor and a third power source;
• a 3-power gate control circuit including a first power supply terminal connected to the first power source, a second power supply terminal connected to the second power source, a third power supply terminal connected to the third power source, a control signal terminal to which a control signal is input, a first output terminal connected to the gate of the ninth P-type transistor, a second output terminal connected to the gate of the tenth P-type transistor, and a third output terminal connected to the gate of the eleventh P-type transistor;
• a 3-power well-potential control circuit including a first power supply terminal connected to the first power source, a second power supply terminal connected to the second power source, a third power supply terminal connected to the third power source, and an output terminal connected to the well of the ninth P-type transistor, the well of the tenth P-type transistor, and the well of the eleventh P-type transistor;
• and
• an inspecting power supply terminal connected to a connection node among the ninth P-type transistor, a tenth P-type transistor, and the eleventh P-type transistor,
• wherein when the control signal is in a low level, the 3-power gate control circuit outputs a voltage equal to the voltage of the first power source to the first output terminal, outputs a voltage equal to the voltage of the second power source to the second output terminal, and outputs a voltage equal to the voltage of the third power source to the third output terminal, and when the control signal is in a high level, the 3-power gate control circuit outputs the earth potential to the first output terminal, the second output terminal, and the third output terminal, and
• wherein the 3-power well-potential control circuit outputs a voltage equal to the voltage of the first power source to the output terminal when the voltage of the first power source is higher than the voltage of the second power source and the voltage of the third power source, and outputs a voltage equal to the voltage of the second power source to the output terminal when the voltage of the second power source is higher than the voltage of the first power source and the voltage of the third power source, and outputs a voltage equal to the voltage of the third power source to the output terminal when the voltage of the third power source is higher than the voltage of the first power source and the voltage of the second power source.

A power switching circuit comprising:

• an eleventh N-type transistor connected between a first power source and a second power source;
• an eighth resistive element connected between the gate of the eleventh N-type transistor and the earth potential;
• and
• an inspecting signal input terminal connected to a connection node between the gate of the eleventh N-type transistor and the eighth resistive element.

A power switching circuit comprising:

• an eleventh N-type transistor connected between a first power source and a second power source;
• an eighth resistive element connected between the gate of the eleventh N-type transistor and the earth potential;
• and
• a twelfth P-type transistor connected between a connection node between the gate of the eleventh N-type transistor and the eighth resistive element, wherein an inverted control signal is input to the gate thereof.

A power switching circuit comprising:

• an eleventh N-type transistor connected between a first power source and a second power source;
• an eighth resistive element connected between the gate of the eleventh N-type transistor and the earth potential;
• a twelfth N-type transistor connected between the first power source and a third power source;
• a ninth resistive element connected between the gate of the eleventh N-type transistor and the earth potential;
• a thirteenth N-type transistor connected between the first power source and a fourth power source;
• a tenth resistive element connected between the gate of the thirteenth N-type transistor and the earth potential;
• and
• an inspecting signal input terminal connected in common to a connection node between the gate of the eleventh N-type transistor and the eighth resistive element, a connection node between the gate of the twelfth N-type transistor and the ninth resistive element, and a connection node between the gate of the thirteenth N-type transistor and the tenth resistive element.

A power switching circuit comprising:

• an eleventh N-type transistor which is connected between a first power source and a second power source and of which the well potential can be controlled by a triple well process;
• an eighth resistive element connected between the gate of the eleventh N-type transistor and the earth potential;
• an inspecting well-potential control terminal connected to the well of the eleventh N-type transistor;
• and
• an inspecting signal input terminal connected to the gate of the eleventh N-type transistor.

A power switching circuit comprising:

• an eleventh N-type transistor which is connected between a first power source and a second power source and of which the well potential can be controlled by a triple well process;
• an eighth resistive element connected between the gate of the eleventh N-type transistor and the earth potential;
• an inspecting well-potential control terminal connected to the well of the eleventh N-type transistor;
• and
• a twelfth P-type transistor connected to a connection node between the gate of the eleventh N-type transistor and the eighth resistive element, wherein an inverted control signal is input to the gate thereof.

A power switching circuit comprising:

• a first P-type transistor and a second P-type transistor connected in series between a first power source and a second power source;
• a fourteenth N-type transistor connected between the first power source and the second power source;
• a PN gate control circuit including a first power supply terminal connected to the first power source, a second power supply terminal connected to the second power source, a control signal terminal to which a control signal is input, an inverted control signal terminal to which an inverted control signal is input, a first output terminal connected to the gate of the first P-type transistor, a second output terminal connected to the gate of the second P-type transistor, and a third output terminal connected to the gate of the fourteenth N-type transistor;
• and
• a well-potential control circuit including a first power supply terminal connected to the first power source, a second power supply terminal connected to the second power source, and an output terminal connected to the well of the first P-type transistor and the well of the second P-type transistor,
• wherein when the control signal is in a low level and the inverted control signal is in a high level, the PN gate control circuit outputs a voltage equal to the voltage of the first power source to the first output terminal, outputs a voltage equal to the voltage of the second power source to the second output terminal, and outputs the earth potential to the third output terminal, and when the control signal is in a high level and the inverted control signal is in a low level, the PN gate control circuit outputs the earth potential to the first output terminal and the second output terminal and outputs a voltage equal to the voltage of the first power source to the third output terminal, and
• wherein the well-potential control circuit outputs a voltage equal to the voltage of the first power source to the output terminal when the voltage of the first power source is higher than the voltage of the second power source, and outputs a voltage equal to the voltage of the second power source to the output terminal when the voltage of the second power source is higher than the voltage of the first power source.

A power switching circuit comprising:

• a first P-type transistor and a second P-type transistor connected in series between a first power source and a second power source;
• a fourteenth N-type transistor connected between the first power source and the second power source;
• a fourteenth resistive element connected between the first power source and the gate of the first P-type transistor;
• a fifteenth resistive element connected between the second power source and the gate of the second P-type transistor;
• an eighteenth N-type transistor connected between the gate of the second P-type transistor and an earth potential;
• a seventeenth resistive element, an eighteenth resistive element, and a seventeenth N-type transistor connected in series between the first power source and the earth potential;
• a first operational amplifier of which a normal input terminal is connected to a connection node between the seventeenth resistive element and the eighteenth resistive element;
• a line for connecting an inverted input terminal of the first operational amplifier and the second power source;
• a twentieth N-type transistor connected between the gate of the first P-type transistor and an output terminal of the first operational amplifier;
• a sixteenth resistive element connected between the gate of the fourteenth N-type transistor and the earth potential;
• a nineteenth N-type transistor connected between the gate of the fourteenth N-type transistor and the output terminal of the first operational amplifier;
• a control signal terminal connected to the gate of the seventeenth N-type transistor, the gate of the eighteenth N-type transistor, the gate of the nineteenth N-type transistor, and the gate of the twentieth N-type transistor;
• and
• a well-potential control circuit having a first power supply terminal, a second power supply terminal, and an output terminal,
• wherein the well-potential control circuit outputs a voltage equal to the voltage of the first power source to the output terminal when the voltage of the first power source is higher than the voltage of the second power source, and outputs a voltage equal to the voltage of the second power source to the output terminal when the voltage of the second power source is higher than the voltage of the first power source.

A power switching circuit comprising:

• an eighteenth P-type transistor connected between an inspecting power supply terminal and a first power source, a nineteenth P-type transistor connected between the inspecting power supply terminal and a second power source, a twentieth P-type transistor connected between the inspecting power supply terminal and a third power source, a twenty first P-type transistor connected between the inspecting power supply terminal and a fourth power source, and a twenty second P-type transistor connected between the inspecting power supply terminal and a fifth power source;
• a 5-power gate control circuit including a first power supply terminal connected to the first power source, a second power supply terminal connected to the second power source, a third power supply terminal connected to the third power source, a fourth power supply terminal connected to the fourth power source, a fifth power supply terminal connected to the fifth power source, a control signal terminal to which a control signal is input, a first output terminal connected to the gate of the eighteenth P-type transistor, a second output terminal connected to the gate of the nineteenth P-type transistor, a third output terminal connected to the gate of the twentieth P-type transistor, a fourth output terminal connected to the gate of the twenty first P-type transistor, and a fifth output terminal connected to the gate of the twenty second P-type transistor;
• and
• a 5-power well-potential control circuit including a first power supply terminal connected to the first power source, a second power supply terminal connected to the second power source, a third power supply terminal connected to the third power source, a fourth power supply terminal connected to the fourth power source, a fifth power supply terminal connected to the fifth power source, and an output terminal simultaneously connected to the well of the eighteenth P-type transistor, the well of the nineteenth P-type transistor, the well of the twentieth P-type transistor, the well of the twenty first P-type transistor, and the well of the twenty second P-type transistor,
• wherein when the control signal is in a low level, the 5-power gate control signal outputs a voltage equal to the voltage of the first power source to the first output terminal, outputs a voltage equal to the voltage of the second power source to the second output terminal, outputs a voltage equal to the voltage of the third power source to the third output terminal, outputs a voltage equal to the voltage of the fourth power source to the fourth output terminal, and outputs a voltage equal to the voltage of the fifth power source to the fifth output terminal, and when the control signal is in a high level, the 5-power gate control circuit outputs the earth potential to the first output terminal, the second output terminal, the third output terminal, the fourth output terminal, and the fifth output terminal, and
• wherein the 5-power well-potential control circuit outputs a voltage equal to the voltage of the first power source to the output terminal when the voltage of the first power source is higher than the voltage of the second power source, the voltage of the third power source, the voltage of the fourth power source, and the voltage of the fifth power source, outputs a voltage equal to the voltage of the second power source to the output terminal when the voltage of the second power source is higher than the voltage of the first power source, the voltage of the third power source, the voltage of the fourth power source, and the voltage of the fifth power source, outputs a voltage equal to the voltage of the third power source to the output terminal when the voltage of the third power source is higher than the voltage of the first power source, the voltage of the second power source, the voltage of the fourth power source, and the voltage of the fifth power source, outputs a voltage equal to the voltage of the fourth power source to the output terminal when the voltage of the fourth power source is higher than the voltage of the first power source, the voltage of the second power source, the voltage of the third power source, and the voltage of the fifth power source, and outputs a voltage equal to the voltage of the fifth power source to the output terminal when the voltage of the fifth power source is higher than the voltage of the first power source, the voltage of the second power source, the voltage of the third power source, and the voltage of the fourth power source.