Load drive circuit
AssigneeNEC Electronics Corporation
InventorMasaji Nakano
Life of this patent
Estimating the term…
Abstract
The load drive circuit 1 includes a FET10, a clamp circuit 20, a control circuit 30, and a temperature measuring unit 40. The FET 10 is a transistor for driving a load 90. The clamp circuit 20 is connected between the gate and the drain of the FET 10. The clamp circuit 20 blocks a carrier flow passing from the gate to the drain when the gate-drain voltage of the FET 10 is not more than a predetermined clamp voltage. On the other hand, the clamp circuit 20 allows the carrier flow when the gate-drain voltage is more than the clamp voltage. The control circuit 30 controls a magnitude of the clamp voltage based upon an output from the temperature measuring unit 40, namely the temperature of the FET 10 measured by the temperature measuring unit 40.
Claims9
A load drive circuit, comprising:
- a field-effect transistor which drives a load;
- a clamp circuit connected between a gate and a drain of said field-effect transistor, blocking carrier flow from said gate to said drain when a gate-drain voltage which is a voltage between said gate and said drain is not more than a predetermined clamp voltage, and allowing said carrier flow when said gate-drain voltage is more than said clamp voltage;
- and
- a control circuit controlling a magnitude of said clamp voltage.
Dependencies are inferred from the claim text.