C4 joint reliability
AssigneeIntel Corporation
InventorsSairam Agraharam, Carlton Hanna, Dongming He, Vasudeva Atluri, Debendra Mallik, Matthew Escobido, Sujit Sharan
Life of this patent
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Abstract
In one embodiment, the invention provides a method comprising fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material used, to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located below the die bump. Advantageously, the method may comprise performing a substrate reflow operation to attach the package substrate to the die bump, without performing a separate wafer reflow operation to reflow the die bump.
Claims30
A method, comprising:
- fabricating a die bump on a die, the die bump being shaped and dimensioned to at least reduce the flow of solder material, used to attach the die bump to a package substrate, towards an under bump metallurgy (UBM) layer located below the die bump.
A method, comprising:
- fabricating a die bump on a die, the die bump making an electrical connection with an under bump metallurgy (UBM) layer on the die;
- and
- forming a wetting layer on the die bump to at least reduce oxidation of the die bump.
An article of manufacture, comprising:
- a semiconductor die comprising an under bump metallurgy (UBM) layer;
- and
- a die bump in contact with the UBM layer and standing proud thereof, the die bump being shaped and dimensioned to at least reduce the flow of solder material therearound towards the UBM layer during a substrate reflow operation performed to form an electrical and/or mechanical connection between the die bump and a substrate.
An article of manufacture, comprising:
- a semiconductor die comprising an under bump metallurgy (UBM) layer;
- and
- a die bump in contact with the UBM layer and standing proud thereof, the die bump including a wetting layer formed thereon to at least reduce oxidation of the die bump.
An article of manufacture comprising:
- a semiconductor die comprising an under bump metallurgy (UBM) layer;
- and
- a die bump in contact with the UBM layer and standing proud thereof, the die bump being shaped and dimensioned to at least prevent the flow of solder material therearound towards the UBM layer during a substrate reflow operation performed to form an electrical and/or mechanical connection between the die bump and a substrate.
Dependencies are inferred from the claim text.