Ferroelectric memory device and method of manufacturing the same
OwnerSusumu Shutoinventor
Life of this patent
Estimating the term…
Abstract
There is disclosed a ferroelectric memory device comprising an MIS transistor formed on a substrate, a ferroelectric film which is formed above the MIS transistor through an interlayer insulating film, and which has a width substantially equal to a channel length of the MIS transistor, and a same wiring layer which connects a diffusion layer of the MIS transistor formed in a surface region of the substrate to a side surface of the ferroelectric film.
Claims20
A ferroelectric memory device comprising:
- an MIS transistor formed on a substrate;
- a ferroelectric film which is formed above the MIS transistor through an interlayer insulating film, and which has a width substantially equal to a channel length of the MIS transistor;
- and
- a same wiring layer which connects a diffusion layer of the MIS transistor formed in a surface region of the substrate to a side surface of the ferroelectric film.
A ferroelectric memory device comprising:
- an MIS transistor formed on a substrate;
- a ferroelectric film which is formed above the MIS transistor through an interlayer insulating film, and which has a width shorter than a channel length of the MIS transistor;
- a wiring film of a predetermined thickness formed on a side surface of the ferroelectric film;
- and
- a wiring layer which is embedded between two cells adjacent to each other, and which connects a diffusion layer of the MIS transistor formed in a surface region of the substrate to the ferroelectric film through the wiring film.
A ferroelectric memory device comprising:
- an MIS transistor formed on a substrate;
- a ferroelectric capacitor which is formed from a ferroelectric film and a pair of electrodes through an interlayer insulating film above the MIS transistor, said pair of electrodes being arranged in a direction of a channel length of the MIS transistor;
- and
- a same wiring layer which connects a diffusion layer of the MIS transistor formed in a surface region of the substrate to a corresponding one of the electrodes of the ferroelectric capacitor.
A ferroelectric memory device comprising:
- an MIS transistor formed on a substrate;
- a ferroelectric capacitor which is formed from a ferroelectric film and a pair of electrodes through an interlayer insulating film above the MIS transistor, said pair of electrodes being arranged in a direction of a channel length of the MIS transistor;
- a wiring film of a predetermined thickness formed on a side surface of the ferroelectric film;
- and
- a wiring layer which is embedded between two cells adjacent to each other, and which connects a diffusion layer of the MIS transistor formed in a surface region of the substrate to the ferroelectric film through the wiring film.
A method of manufacturing a ferroelectric memory device, comprising:
- forming an insulating film on a surface of a substrate;
- depositing a gate electrode film on the insulating film;
- depositing an interlayer insulating film on the gate electrode;
- depositing a ferroelectric film on the interlayer insulating film;
- processing the ferroelectric film, the interlayer insulating film, the gate electrode film, and the insulating film mutually in a self-aligning manner;
- forming diffusion layers in the substrate;
- and
- forming a same wiring film which connects the ferroelectric film and the diffusion layers.
A method of manufacturing a ferroelectric memory device, comprising:
- forming an insulating film on a principal surface of a substrate;
- depositing a gate electrode film on the insulating film;
- depositing an interlayer insulating film on the gate electrode;
- depositing a ferroelectric film on the interlayer insulating film;
- processing the ferroelectric film;
- forming capacitor electrode films on side surfaces of the processed ferroelectric film;
- processing the interlayer insulating film, the gate electrode film, and the insulating film mutually with the capacitor electrode films in a self-aligning manner;
- forming diffusion layers in the substrate;
- and
- forming a buried wiring layer which connects the ferroelectric film and the diffusion layers.
Dependencies are inferred from the claim text.