One terminal capacitor interface circuit

A capacitance to voltage converter circuit for sensing the capacitance of a one terminal capacitor comprising:

• a differential integrating amplifier having an input common mode voltage and two summing nodes whose voltage is substantially equal to said input common mode voltage;
• a switching circuit for charging said capacitor to a first voltage level in a first phase, connecting, in a second phase, said capacitor to one of said summing nodes of said differential amplifier to provide a first output change substantially representative of the difference between said first voltage level and said input common mode voltage;
• and also representative of said capacitor;
• charging said capacitor to a second voltage level in a third phase, and connecting, in a fourth phase, said capacitor to the other summing node of said differential amplifier to provide a second output change substantially representative of the difference between said second voltage level and said input common mode voltage, and also representative of said capacitor;
• the combined first and second output changes representing the capacitance of said capacitor substantially independent of said input common mode voltage, and
• a reset switching circuit for resetting the differential integrating amplifier.

A capacitive input sigma delta modulator for sensing the capacitance of a one terminal capacitor comprising:

• at least one integrating stage, a quantizer and a digital to analog converter having positive and negative reference voltage, the first integrating stage including
• a differential integrating amplifier having an input common mode voltage and two summing nodes whose voltage is substantially equal to said input common mode voltage;
• a switching circuit for charging said capacitor to a first voltage level in a first phase, connecting, in a second phase, said capacitor to one of said summing nodes of said differential amplifier to provide a first output change substantially representative of the difference between said first voltage level and said input common mode voltage, and also representative of said capacitor;
• charging said capacitor to a second voltage level in a third phase, and connecting, in a fourth phase, said capacitor to the other summing node of said differential amplifier to provide a second output change substantially representative of the difference between said second voltage level and said input common mode voltage, and also representative of said capacitor;
• the combined first and second output changes representing the capacitance of said capacitor substantially independent of said input common mode voltage.

A differential capacitor one terminal capacitor interface circuit for sensing the capacitance of first and second capacitors comprising:

• a differential integrating amplifier having first and second summing nodes and an input common mode voltage;
• and
• a switching circuit for charging a first capacitor of said differential one terminal capacitor to a first voltage level and a second capacitor of said differential one terminal capacitor to a second voltage level in a first phase, in a second phase connecting said first capacitor to said first summing node and said second capacitor to said second summing node of said amplifier to provide first and second output changes substantially representative of the difference between said first and second voltage levels and said input common mode voltage, in a third phase charging said first capacitor to said second voltage level and said second capacitor to said first voltage level, and in a fourth phase connecting said first capacitor to said second summing node and said second capacitor to said first summing node of said amplifier to provide third and fourth output changes substantially representative of the difference between said first and second voltage levels and said input common mode voltage, the combined first, second, third and fourth changes representing the capacitance of said first and second capacitors substantially independent of said input common mode voltage.

A capacitive input sigma delta modulator for sensing the capacitance of a differential one terminal capacitor comprising:

• at least one integrating stage, a quantizer and a digital to analog converter having positive and negative reference voltage, the first said integrating stage including
• a differential integrating amplifier having first and second summing nodes and an input common mode voltage;
• and
• a switching circuit for charging a first capacitor of said differential one terminal capacitor to a first voltage level and a second capacitor of said differential one terminal capacitor to a second voltage level in a first phase, in a second phase connecting said first capacitor to said first summing node and said second capacitor to said second summing node of said amplifier to provide first and second output changes substantially representative of the difference between said first and second voltage levels and said input common mode voltage, in a third phase charging said first capacitor to said second voltage level and said second capacitor to said first voltage level, and in a fourth phase connecting said first capacitor to said second summing node and said second capacitor to said first summing node of said amplifier to provide third and fourth output changes substantially representative of the difference between said first and second voltage levels and said input common mode voltage, the combined first, second, third and fourth changes representing the capacitance of said first and second capacitors substantially independent of said input common mode voltage.