Method for realizing circuit layout
AssigneeUnited Microelectronics Corp.
InventorTsuoe-Hsiang Liao
Life of this patent
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Abstract
A method for realizing circuit layouts. Complex integrated circuit includes cells of basic functions, and layout designs for these cells can be recorded as a library. The claimed invention replaces common power strips with grid power contacts/vias in the layout of each cell. While realizing the layout of an integrated circuit, a routing procedure is used to connect power of all cells arranged in the integrated circuit. Because power strips are avoided in each cell, the claimed invention can reduce layout height of each cell, and therefore increase integration of integrated circuits.
Claims10
A method for realizing circuit layout, the method comprising:
- establishing a library, and utilizing the library to record layout designs of a plurality of cells, wherein each cell's layout design comprises at least one power layout design for allowing the cell to receive operation power;
- and
- when designing each cell's power layout design, keeping the power layout from connecting two different sides of the cell' layout design.
A method for realizing circuit layout, the method comprising:
- establishing a library, and utilizing the library to record layout designs of a plurality of cells, wherein each cell's layout design comprises at least one power layout design for allowing the cell to receive operation power;
- and
- when designing each cell's power layout design, keeping an arranged cell's power layout from connecting with an adjacent cell's power layout.
Dependencies are inferred from the claim text.