Method and system for formal unidirectional bus verification
AssigneeInternational Business Machines Corporation
InventorsJason Baumgartner, Tilman Gloekler, Joachim Kneisel, Johannes Koesters
Life of this patent
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Abstract
A method, system and computer program product for performing verification is disclosed. A high-level description of a design is created and constrained drivers are synthesized from the high-level description of the design. A testbench is generated from the high-level description of the design and the constrained drivers and a formal equivalence is evaluated on the testbench to perform verification.
Claims20
A method for performing verification, said method comprising:
- receiving a high-level description of a design;
- synthesizing constrained drivers from a high-level description of said design;
- generating a testbench from said high-level description of said design and said constrained drivers;
- and
- evaluating a formal equivalence on said testbench to perform verification.
A system for performing verification, said system comprising:
- means for creating a high-level description of a design;
- means for synthesizing constrained drivers from said high-level description of said design;
- means for generating a testbench from said high-level description of said design and said constrained drivers;
- and
- means for evaluating a formal equivalence on said testbench to perform verification.
A computer program product in a computer-readable medium for performing verification, said computer program product comprising:
- a computer-readable medium;
- instructions on the computer-readable medium for creating a high-level description of a design;
- instructions on the computer-readable medium for synthesizing constrained drivers from said high-level description of said design;
- instructions on the computer-readable medium for generating a testbench from said high-level description of said design and said constrained drivers;
- and
- instructions on the computer-readable medium for evaluating a formal equivalence on said testbench to perform verification.
Dependencies are inferred from the claim text.