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US 2006/0190751 A1Published application
Method and apparatus for reducing power consumption in a memory bus interface by selectively disabling and enabling sense amplifiers
AssigneeIntel Corporation
InventorsJeffrey Wilcox, Noam Yosef
Life of this patent
Estimating the term…
Abstract
A technique includes amplifying data signals from a memory bus interface. The amplified data signals are sampled, and the amplifier is selectively disabled in response to the absence of a predetermined operation occurring over the memory bus. In some embodiments of the invention, the amplification may be selectively enabled in response to the beginning of the predetermined operation over the memory bus.
Claims13
A method comprising:
- amplifying data signals received into a memory controller from a memory bus in response to a read operation;
- sampling the amplified data signals;
- and
- selectively disabling the amplification in response to the absence of a predetermined operation occurring over the memory bus.
1 more element
A memory controller comprising:
- amplifiers to amplify data signals received from a memory bus in response to a read operation over the memory bus;
- a sampler coupled to the amplifiers to sample the amplified data signals;
- and
- a controller to selectively disable the amplifiers in response to the absence of a predetermined operation occurring over the memory bus.
1 more element
A computer system comprising:
- a synchronous dynamic random access memory;
- a memory bus coupled to the memory;
- and
- a memory controller to initiate a read operation with the memory over the memory bus, the memory controller comprising amplifiers and adapted to disable the amplifiers in response to the absence of a predetermined operation occurring over the memory bus.
1 more element
Dependencies are inferred from the claim text.