Weighted processor selection apparatus and method for use in multiprocessor systems
AssigneeIntel Corporation
InventorTodd Schelling
Life of this patent
Estimating the term…
Abstract
A processor programmed to write to a memory location a first weighted value corresponding to the processor to overwrite a second weighted value stored in the memory location and associated with another processor. The processor is also programmed to compare the first weighted value of the processor with the second weighted value associated with the other processor and to select the processor if the first weighted value of the processor is better than the second weighted value.
Claims23
1-45. (canceled)
A processor programmed to:
- write to a memory location a first weighted value corresponding to the processor to overwrite a second weighted value stored in the memory location and associated with another processor;
- compare the first weighted value of the processor with the second weighted value associated with the other processor;
- and
- select the processor if the first weighted value of the processor is better than the second weighted value.
A semiconductor circuit to be communicatively coupled to a processing unit, the semiconductor circuit to:
- write a first weighted value to a memory location based on information stored in the memory location at substantially the same time as another processing unit writes a second weighted value to the memory location;
- compare the first weighted value associated with the processing unit to the second weighted value associated with the other processing unit;
- and
- select the processing unit if the first weighted value is better than the second weighted value.
A processor programmed to:
- substantially synchronize with a plurality of other processors following a reset operation;
- contend for a memory location a plurality of times with each of the plurality of other processors;
- and
- read data in the memory location to determine whether the processor is a bootstrap processor.
A semiconductor circuit to be communicatively coupled to a processing unit, the semiconductor circuit to:
- write a first weighted value to a memory location based on a comparison of the first weighted value to a second weighted value stored in the memory location, wherein the second weighted value is associated with another processing unit;
- and
- select the processing unit based on the comparison.
Dependencies are inferred from the claim text.