Handling permanent and transient errors using a SIMD unit

A computer readable medium including computer instructions for handling permanent and transient errors in a microprocessor, the computer instructions including instructions for:

• reading a scalar value and a scalar operation from an execution unit of the microprocessor;
• writing a copy of the scalar value into each of a plurality of elements of a vector register of a Single Instruction Multiple Data (SIMD) unit of the microprocessor;
• executing the scalar operation on each scalar value in each of the plurality of elements of the vector register of the SIMD unit using a vector operation;
• comparing each result of the scalar operation on each scalar value in each of the plurality of elements of the vector register;
• and
• detecting a permanent or transient error if all of the results are not identical.

A microprocessor for handling permanent and transient errors, comprising:

• a first execution unit configured for reading a scalar value and a scalar operation from another execution unit;
• a Single Instruction Multiple Data (SIMD) unit, including a vector register, configured for:
• accepting a copy of the scalar value into each of a plurality of elements of the vector register;
• and
• executing the scalar operation on each scalar value in each of the plurality of elements of the vector register of the SIMD unit using a vector operation;
• and
• a second execution unit configured for:
• comparing each result of the scalar operation on each scalar value in each of the plurality of elements of the vector register;
• and
• detecting a permanent or transient error if all of the results are not identical.