Die-to-die interconnect interface and protocol for stacked semiconductor dies
AssigneeTexas Instruments Incorporated
InventorsNicolas Chauve, Tarek Zghal, Maxime Leclercq
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AssigneeTexas Instruments Incorporated
InventorsNicolas Chauve, Tarek Zghal, Maxime Leclercq
Estimating the term…
A system and method for a die-to-die interconnect interface and protocol for stacked semiconductor dies. One preferred embodiment comprises an integrated circuit (IC) package comprising a first semiconductor die that includes an interface to a memory-mapped device, a second semiconductor die that does not include an interface to a memory mapped device, and a data bus coupling the first semiconductor die to the second semiconductor die (the data bus used to transfer a control word and a data word). The control word comprises a data word start address that corresponds to a location in the memory-mapped device. The data word is transferred from the second semiconductor die to the first semiconductor die and is stored by the first semiconductor die at the location in the memory-mapped device. Both semiconductor dies are mounted within the IC package.
An integrated circuit (IC) package, comprising:
An integrated circuit (IC) package, comprising:
A method used in an integrated circuit package comprising a first semiconductor die and a second semiconductor die, the first semiconductor die coupled to a memory-mapped device, comprising:
A method used in an integrated circuit package comprising a first semiconductor die and a second semiconductor die, the first semiconductor die coupled to a memory-mapped device, comprising:
Dependencies are inferred from the claim text.