Data transfer system and data transfer method
AssigneeFujitsu Limited
InventorsHitoshi Yoda, Hiroyuki Utsumi
Life of this patent
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Abstract
A buffer memory temporarily stores data sequentially outputted to a data using apparatus. A memory is accessed by at least one memory access circuit via a bus. A data transfer circuit performs a data transfer from the memory to the buffer memory via the bus. The data transfer circuit performs the data transfer from the memory to the buffer memory under a state where the bus is occupied by the data transfer circuit from when an amount of data in the buffer memory is less than a first predetermined amount to when the amount of data in the buffer memory exceeds a second predetermined amount larger than the first predetermined amount.
Claims10
A data transfer system comprising:
- a buffer memory in which data sequentially outputted to a data using apparatus is temporarily stored;
- a memory accessed by at least one memory access circuit via a bus;
- and
- a data transfer circuit performing a data transfer from the memory to the buffer memory via the bus, wherein
- the data transfer circuit performs the data transfer under a state where the bus is occupied by the data transfer circuit from when an amount of data in the buffer memory is less than a first predetermined amount to when the amount of data in the buffer memory exceeds a second predetermined amount larger than the first predetermined amount.
A data transfer system comprising:
- a buffer memory in which data sequentially captured from a data supply apparatus is temporarily stored;
- a memory accessed by at least one memory access circuit via a bus;
- and
- a data transfer circuit performing a data transfer from the buffer memory to the memory via the bus, wherein
- the data transfer circuit performs the data transfer under a state where the bus is occupied by the data transfer circuit from when an amount of data in the buffer memory exceeds a first predetermined amount to when the amount of data in the buffer memory is less than a second predetermined amount smaller than the first predetermined amount.
A data transfer method comprising the step of performing a data transfer via a bus from a memory accessed by at least one memory access circuit via the bus to a buffer memory in which data sequentially outputted to a data using apparatus is temporarily stored, wherein
- the data transfer is performed under a state where the bus is occupied from when an amount of data in the buffer memory is less than a first predetermined amount to when the amount of data in the buffer memory exceeds a second predetermined amount larger than the first predetermined amount.
A data transfer method comprising the step of performing a data transfer via a bus from a buffer memory, in which data sequentially captured from a data supply apparatus is temporarily stored, to a memory accessed by at least one memory access circuit via the bus, wherein
- the data transfer is performed under a state where the bus is occupied from when an amount of data in the buffer memory exceeds a first predetermined amount to when the amount of data in the buffer memory is less than a second predetermined amount smaller than the first predetermined amount.
Dependencies are inferred from the claim text.