Handling node address failure in a distributed nodal system of processors

A distributed nodal system of processors, comprising:

• a network;
• and
• a plurality of processor nodes comprising nodes of said network, each of said plurality of processor nodes comprising at least one processor and at least one interface to said network;
• at least one of said plurality of processor nodes:
• determines a nominal node address as its own;
• senses node addresses of other processor nodes of said network;
• compares said sensed node addresses of other processor nodes with said nominal node address;
• determines existence of any conflict between at least one of said sensed node addresses of other processor nodes with said nominal node address, said existing conflict comprising a node address failure of said processor node for said network;
• and
• upon detection of said node address failure of said processor node for said network, disables said processor node nominal node address from said network at said at least one interface.

A distributed nodal system of processors, comprising:

• a network;
• and
• a plurality of processor nodes comprising nodes of said network, at least two of said plurality of processor nodes subject to reset, and comprising at least one processor, at least one interface to said network, and a timer, said timer maintaining an indication of time since said processor node has been reset;
• (I) at least one of said plurality of processor nodes:
• determines a nominal node address as its own;
• senses node addresses of other processor nodes of said network;
• compares said sensed node addresses of other processor nodes with said nominal node address;
• determines existence of any conflict between at least one of said sensed node addresses of other processor nodes with said nominal node address, said existing conflict comprising a node address failure in said network;
• and
• (II) said processor node having said conflicting sensed node address:
• compares the time of said timer of said processor node to the time of said timer of said other processor node having said conflicting said sensed node address, to determine the processor node having the more recent time of said timers;
• and
• if said processor node has said more recent time, disables said processor node nominal node address from said network at said at least one interface.

A processor node for a distributed nodal system of processors, said system comprising a network and a plurality of processor nodes, said processor node comprising:

• at least one interface to said network;
• and
• at least one processor, said at least one processor:
• upon detection of a node address failure of said processor node for said network, disables said processor node from said network at said at least one interface.

A processor node for a distributed nodal system of processors, said system comprising a network and a plurality of processor nodes, said processor node comprising:

• at least one interface to said network;
• and
• at least one processor, said at least one processor:
• determines a nominal node address as its own;
• senses node addresses of other processor nodes of said network;
• compares said sensed node addresses of other processor nodes with said nominal node address;
• determines existence of any conflict between at least one of said sensed node addresses of other processor nodes with said nominal node address, said existing conflict comprising a node address failure of said processor node for said network;
• and
• upon detection of said node address failure of said processor node for said network, disables said processor node nominal node address from said network at said at least one interface.

A processor node for a distributed nodal system of processors, said system comprising a network and a plurality of processor nodes, at least two of said plurality of processor nodes subject to reset, said processor node comprising one of said plurality of processor nodes subject to reset:

• at least one interface to said network;
• a timer, said timer maintaining an indication of time since said processor node has been reset;
• and
• at least one processor, said at least one processor:
• determines a nominal node address as its own;
• senses node addresses of other processor nodes of said network;
• compares said sensed node addresses of other processor nodes with said nominal node address;
• determines existence of any conflict between at least one of said sensed node addresses of other processor nodes with said nominal node address, said existing conflict comprising a node address failure in said network;
• and
• compares the time of said timer of said processor node to the time of said timer of said other processor node having said conflicting said sensed node address, to determine the processor node having the more recent time of said timers;
• and
• if said processor node has said more recent time, disables said processor node nominal node address from said network at said at least one interface.

A computer program product of a computer readable medium usable with a programmable computer, said computer program product having computer readable program code embodied therein for handling addressing failure of a nodal system of processors, said nodal system comprising a network;

• and a plurality of processor nodes comprising nodes of said network, each of said plurality of processor nodes comprising at least one processor and at least one interface to said network;
• said computer program product comprising:
• computer readable program code which causes said at least one processor of at least one of said processor nodes, to detect a node address failure of said processor node for said network;
• and
• computer readable program code which causes said at least one processor of said processor node, to, upon detecting said node address failure, disable said processor node from said network at said at least one interface.

A computer program product of a computer readable medium usable with a programmable computer, said computer program product having computer readable program code embodied therein for handling addressing failure of a nodal system of processors, said nodal system comprising a network;

• and a plurality of processor nodes comprising nodes of said network, each of said plurality of processor nodes comprising at least one processor and at least one interface to said network;
• said computer program product comprising:
• computer readable program code which causes said at least one processor of at least one of said processor nodes, to determine a nominal node address as its own;
• computer readable program code which causes said at least one processor of said processor node, to sense node addresses of other processor nodes of said network;
• computer readable program code which causes said at least one processor of said processor node, to compare said sensed node addresses of other processor nodes with said nominal node address;
• computer readable program code which causes said at least one processor of said processor node, to determine existence of any conflict between at least one of said sensed node addresses of other processor nodes with said nominal node address, said existing conflict comprising a node address failure of said processor node for said network;
• and
• computer readable program code which causes said at least one processor of said processor node, to, upon detection of said node address failure of said processor node for said network, disable said processor node nominal node address from said network at said at least one interface.

A computer program product of a computer readable medium usable with a programmable computer, said computer program product having computer readable program code embodied therein for handling addressing failure of a nodal system of processors, said nodal system comprising a network;

• and a plurality of processor nodes comprising nodes of said network, at least two of said plurality of processor nodes subject to reset, and comprising at least one processor, at least one interface to said network, and a timer, said timer maintaining an indication of time since said processor node has been reset;
• said computer program product comprising:
• computer readable program code which causes said at least one processor of at least one of said processor nodes, to determine a nominal node address of said processor node;
• computer readable program code which causes said at least one processor of said processor node, to sense node addresses of other processor nodes of said network;
• computer readable program code which causes said at least one processor of said processor node, to compare said sensed node addresses of other processor nodes with said nominal node address of said processor node;
• computer readable program code which causes said at least one processor of said processor node, to determine existence of any conflict between at least one of said sensed node addresses of other processor nodes with said nominal node address of said processor node, said existing conflict comprising a node address failure in said network;
• computer readable program code which causes said at least one processor of said processor node, to compare the time of said timer of said processor node having said nominal node address to the time of said timer of said other processor node having said conflicting said sensed node address, to determine the processor node having the more recent time of said timers;
• and
• computer readable program code which causes said at least one processor of said processor node, to, if said processor node is determined to have said more recent time of said timers, disable said processor node nominal node address from said network at said at least one interface.

A processor node for a distributed nodal system of processors, said system comprising a network and a plurality of processor nodes, said processor node associated with at least one element, said processor node comprising:

• at least one interface to said network;
• and
• at least one processor, said at least one processor:
• maintains designating information of said at least one element associated with said processor node;
• determines a nominal node address as an address for said processor node for said network;
• senses present designating information of at least one element associated with said processor node;
• compares said present designating information to said maintained designating information;
• determines whether a match is made between said compared said present designating information and said maintained designating information, a failure of said match comprising a node address failure of said processor node for said network;
• and
• upon said node address failure of said processor node for said network, disables said processor node nominal node address from said network at said at least one interface.

A method for determining and handling addressing failure of a processor node of a distributed nodal system of processors, said system comprising a network and a plurality of processor nodes, at least one of said plurality of processor nodes associated with at least one element, said at least one processor node comprising at least one processor and at least one interface to said network;

• said method comprising the steps of
• maintaining designating information of said at least one element associated with said processor node;
• determining a nominal node address as an address for said processor node for said network;
• sensing present designating information of at least one element associated with said processor node;
• comparing said present designating information to said maintained designating information;
• determining whether a match is made between said compared said present designating information and said maintained designating information, a failure of said match comprising a node address failure of said processor node for said network;
• and
• upon said node address failure of said processor node for said network, disabling said processor node nominal node address from said network at said at least one interface.

A computer program product of a computer readable medium usable with a programmable computer, said computer program product having computer readable program code embodied therein for determining and handling addressing failure of a nodal system of processors, said nodal system comprising a network;

• and a plurality of processor nodes comprising nodes of said network, at least one of said plurality of processor nodes associated with at least one element, said at least one processor node comprising at least one processor and at least one interface to said network;
• said computer program product comprising:
• computer readable program code which causes said at least one processor of said processor node to maintain designating information of said at least one element associated with said processor node;
• computer readable program code which causes said at least one processor of said processor node to determine a nominal node address as an address for said processor node for said network;
• computer readable program code which causes said at least one processor of said processor node to sense present designating information of at least one element associated with said processor node;
• computer readable program code which causes said at least one processor of said processor node to compare said present designating information to said maintained designating information;
• computer readable program code which causes said at least one processor of said processor node to determine whether a match is made between said compared said present designating information and said maintained designating information, a failure of said match comprising a node address failure of said processor node for said network;
• and
• computer readable program code which causes said at least one processor of said processor node to, upon said node address failure of said processor node for said network, disable said processor node nominal node address from said network at said at least one interface.