Method and system for hardware based reporting of assertion information for emulation and hardware acceleration
AssigneeQuickturn Design Systems, Inc.
InventorsLisa Piper, Carol Lemche, Arthur Jurchisin, Purnima Das
Life of this patent
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Abstract
A method and system for hardware based reporting of assertion information for emulation and hardware acceleration is disclosed. In one embodiment, a method of performing assertion-based verification, comprises providing a user interface to design assertions that aid in verifying an integrated circuit design. Assertion instrumentation code is generated to implement the assertions in hardware as assertion instrumentation. The assertion instrumentation code is provided to an emulator that generates the assertion instrumentation.
Claims48
A method of performing assertion-based verification, comprising:
- providing a user interface to design assertions that aid in verifying an integrated circuit design;
- generating assertion instrumentation code to implement the assertions in hardware as assertion instrumentation;
- and
- providing the assertion instrumentation code to an emulator that generates the assertion instrumentation.
A method, comprising:
- receiving assertion instrumentation code from a workstation;
- and
- implementing the assertion instrumentation code in hardware within the emulator.
A system of performing assertion-based verification, comprising:
- means for providing a user interface to design assertions that aid in verifying an integrated circuit design;
- means for generating assertion instrumentation code to implement the assertions in hardware as assertion instrumentation;
- and
- means for providing the assertion instrumentation code to an emulator that generates the assertion instrumentation.
A system, comprising:
- means for receiving assertion instrumentation code from a workstation;
- and
- means for implementing the assertion instrumentation code in hardware within the emulator.
A computer-readable medium having stored thereon a plurality of instructions, said plurality of instructions when executed by a computer, cause said computer to perform:
- providing a user interface to design assertions that aid in verifying an integrated circuit design;
- generating assertion instrumentation code to implement the assertions in hardware as assertion instrumentation;
- and
- providing the assertion instrumentation code to an emulator that generates the assertion instrumentation.
A computer-readable medium having stored thereon a plurality of instructions, said plurality of instructions when executed by a computer, cause said computer to perform:
- receiving assertion instrumentation code from a workstation;
- and
- implementing the assertion instrumentation code in hardware within the emulator.
An apparatus, comprising:
- a processor coupled to a bus;
- memory coupled to the bus that stores instructions;
- and
- an emulator interface,
- wherein the instructions provide a user interface to design assertions that aid in verifying an integrated circuit design,
- wherein the processor generates assertion instrumentation code to implement the assertions in hardware as assertion instrumentation;
- and
- wherein the emulator interface provides the assertion instrumentation code to an emulator that generates the assertion instrumentation.
An emulator, comprising:
- a workstation interface that receives assertion instrumentation code from a workstation;
- and
- a processor that implements the assertion instrumentation code in hardware within the emulator.
Dependencies are inferred from the claim text.