Method and system for timing measurement of embedded macro module
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hui Hsieh, Hau-Tai Shieh, Tao-Ping Wang
Life of this patent
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Abstract
A method and system is presented for measuring a data access time of an embedded macro module in an integrated circuit. A single external test signal is inputted into the embedded macro module for enabling a data input therein and extracting a data output therefrom. A pulse width of the single external test signal is incrementally increased until a latch of the data output is observed. Then, the data access time is obtained, as its substantially equals a time interval of the increased pulse width.
Claims19
A method for measuring a data access time of an embedded macro module in an integrated circuit, comprising:
- providing a single external test signal into the embedded macro module for extracting an output therefrom based on a predetermined input;
- incrementally increasing a pulse width of the single external test signal in one or more test cycles until the output is observed;
- and
- obtaining the data access time of the embedded macro module,
- wherein the data access time equals substantially a time interval of the increased pulse width.
A system for measuring a data access time of an embedded macro module in an integrated circuit, comprising:
- a first latch control module coupled to the embedded macro module for controlling a data input thereinto;
- a second latch control module associated with the device array for controlling a data output therefrom;
- a latch coupled between the second control module and the embedded macro module for examining the data output;
- a tester for inputting a single test signal to the circuit and determining the data access time based on the data output latched in by the latch under the control of the second latch control module,
- wherein the single test signal is provided to the first and second latch control modules through a first branch and a second branch of a test line, respectively, and
- wherein the first branch and the second branch have substantially the same amount of propagation delay time from the tester to the first and second latch control modules, respectively.
A method for measuring a data access time of a memory array embedded in an integrated circuit, comprising:
- inputting a single external test signal from an external tester into the circuit for providing a data input to the memory array to cause a data output therefrom;
- examining the data output from the memory array by a latch module;
- incrementally increasing a pulse width of the single external test signal in one or more test cycles until the data output is observed;
- and
- obtaining the data access time, which substantially equals a time interval of the increased pulse width,
- wherein the single external test signal splits into a first control signal for enabling the data input to be provided to the memory array, and a second control signal for enabling a latching of the examined data output, and
- wherein time delays of the first and second control signals travel through the circuit are substantially the same.
Dependencies are inferred from the claim text.