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US 2006/0190208 A1Published application
System and method for testing a memory
AssigneeVirage Logic Corporation
InventorsNiranjan Behera, Bruce Prickett
Life of this patent
Estimating the term…
Abstract
A method and apparatus for testing a memory at speed. A test and repair wrapper integrated with a memory instance is operable to receive test information scanned in from a built-in self-test and repair (BISTR) processor. Logic circuitry associated with the test and repair wrapper is operable to generate address, data and command signals based on the scanned test information, wherein the signals are used for effectuating one or more tests with respect to the memory instance.
Claims24
A method of testing a memory instance, comprising:
- scanning test information into a test and repair wrapper integrated with said memory instance;
- providing a strobe control signal to said test and repair wrapper for signaling commencement of testing operations with respect to said memory instance;
- generating, by said test and repair wrapper, at least one of an address signal, a data signal and a command signal based on said scanned test information;
- and
- executing at least one test by said test and repair wrapper with respect to said memory instance based on said address, data and command signals.
2 more elements
An apparatus for testing a memory instance, comprising:
- a built-in self-test and repair (BISTR) processor associated with said memory instance for scanning test information into a test and repair wrapper integrated with said memory instance, wherein said test and repair wrapper is operable to commence testing operations with respect to said memory instance responsive to a strobe control signal provided by said BISTR processor;
- and
- logic circuitry associated with said test and repair wrapper for generating at least one of an address signal, a data signal and a command signal based on said scanned test information, wherein at least one test may be executed by said test and repair wrapper with respect to said memory instance based on said address, data and command signals.
Dependencies are inferred from the claim text.