Method for forming an integrated circuit semiconductor substrate
AssigneeSTMicroelectronics S.r.l.
InventorsMichel Marty, Gregory Avenier
Life of this patent
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Abstract
An integrated circuit semiconductor substrate includes an active silicon layer separated from a silicon substrate layer by a buried insulating material layer. The active silicon layer, however, locally includes at least one over-thickness on the side of the buried layer, while maintaining a flat surface state of the semiconductor layer across the integrated circuit. The over-thickness is created by forming a cavity under the active silicon layer in the local area, and then providing the over-thickness by partially filling the cavity at the bottom of the active silicon layer through epitaxial growth. An insulating layer then fills the remaining portions of the cavity.
Claims20
A method for forming an over-thickness in the active layer of an integrated circuit semiconductor substrate that includes a substrate layer separated from said active layer by a buried layer made of insulating material, comprising:
- locally delimiting an area of said active layer where a thickness must be increased by creating deep insulation trenches that extend from a surface of said active layer to the substrate layer,
- accessing a section of the buried layer located underneath the delimited area of the active layer,
- eliminating a portion of the buried layer by isotropic etching so that a cavity is formed underneath the active layer,
- increasing through epitaxy the active layer area in the cavity thus formed, so that the thickness of the active layer is increased at its bottom.
A method, comprising:
- forming an SOI structure including a substrate silicon layer, an insulating layer overlying the substrate silicon layer and a doped silicon layer overlying the insulating layer;
- excavating the insulating layer beneath an active area of the doped silicon layer to form a cavity;
- increasing a depth of the doped silicon layer, the increased depth partially filling the cavity;
- and
- insulating the increased depth doped silicon layer from the substrate silicon layer with a formed insulator in the cavity.
An integrated circuit, comprising:
- an SOI structure including a substrate silicon layer, an insulating layer overlying the substrate silicon layer having a first thickness and a doped silicon layer overlying the insulating layer having a second thickness;
- and
- an active region delimited within the SOI structure wherein the insulating layer has a third thickness which is less than the first thickness, and the doped silicon layer has a fourth thickness which is greater than the third thickness.
Dependencies are inferred from the claim text.