Method for fabricating semiconductor device
AssigneeHynix Semiconductor Inc.
InventorsMin-Suk Lee, Sung-Kwon Lee
Life of this patent
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Abstract
A method for fabricating a semiconductor device is provided. The method includes: forming at least two gate patterns over a substrate; forming a first sidewall layer over on entire of the substrate structure including gat patterns; forming an insulation layer over the first sidewall layer; selectively removing the insulation layer between the gate patterns to form a contact hole partially exposing the first sidewall layer; forming a second sidewall layer over the first sidewall layer exposed by the contact hole; and removing the first and the second sidewall layers disposed at a bottom portion of the contact hole to expose a selected portion of the substrate between the gate patterns.
Claims52
A method for fabricating a semiconductor device comprising:
- forming at least two gate patterns over a substrate;
- forming a first sidewall layer over on entire of the substrate structure including gat patterns;
- forming an insulation layer over the first sidewall layer;
- selectively removing the insulation layer between the gate patterns to form a contact hole partially exposing the first sidewall layer;
- forming a second sidewall layer over the first sidewall layer exposed by the contact hole;
- and
- removing the first and the second sidewall layers disposed at a bottom portion of the contact hole to expose a selected portion of the substrate between the gate patterns.
A method for fabricating a semiconductor device comprising:
- forming at least two gate patterns over a substrate;
- forming a first spacer over sidewalls of the gate patterns;
- forming an insulation layer over the gate patterns;
- selectively removing the insulation layer between the gate patterns to form a contact hole exposing a portion of the substrate between the gate patterns;
- forming a spacer layer over the portion of the substrate and the first spacer exposed by the contact hole;
- and
- removing the spacer layer disposed at a bottom portion of the contact hole to form a second spacer over the first spacer.
A method for fabricating a semiconductor device comprising:
- forming at least two gate patterns over a substrate;
- forming a first sidewall layer over an entire of a substrate structure including the gate pattern;
- forming an auxiliary sidewall layer over the first sidewall layer;
- forming an insulation layer over the auxiliary sidewall layer;
- selectively removing the insulation layer between the gate patterns to form a contact hole partially exposing the auxiliary sidewall layer;
- forming a second sidewall layer over the auxiliary sidewall layer exposed by the contact hole;
- and
- removing the first sidewall layer, the auxiliary sidewall layer and the second sidewall layers disposed at a bottom portion of the contact hole to expose a portion of the substrate between the gate patterns.
A method for fabricating a semiconductor device comprising:
- forming at least two gate patterns over a substrate;
- forming a first spacer over sidewalls of the gate patterns;
- forming an auxiliary spacer over the first spacer;
- forming an insulation layer over the gate patterns;
- removing the insulation layer between the gate patterns to form a contact hole exposing a portion of the substrate between the gate patterns;
- forming a spacer layer over an inside of the contact hole;
- and
- removing the spacer layer disposed at a bottom portion of the contact hole to form a second spacer over the auxiliary spacer.
Dependencies are inferred from the claim text.