Trench-gate electrode for FinFET device

A semiconductor device comprising:

• a source region, a drain region, and one or more fins formed on a substrate, wherein the fins connect the source region to the drain region;
• a gate electrode having a substantially planar surface overlying the fins and positioned between the drain region and the source region;
• a first set of spacers positioned between the gate electrode and the source region and between the gate electrode and the drain region;
• and
• a second set of spacers positioned on at least a portion of the source region and the drain region alongside at least a portion of the first set of spacers.

A method of forming a FinFET, the method comprising:

• providing a substrate, the substrate having a semiconductor layer formed over an insulator layer;
• forming an isolation mask layer over the semiconductor layer;
• patterning the isolation mask layer in accordance with an isolation pattern;
• forming an isolation region from the semiconductor layer, the isolation region corresponding to the isolation pattern;
• removing remaining portions of the isolation mask layer;
• forming a trench mask layer over the isolation region;
• forming a trench in the trench mask layer, exposing at least a portion of the semiconductor layer;
• patterning one or more fins in exposed regions of the semiconductor layer;
• forming first insulating spacers along sidewalls of the trench;
• forming a conductive layer within the trench over the fins;
• removing remaining portions of the trench mask layer, thereby exposing a source region and a drain region;
• and
• doping the source region and the drain region.