Drawing apparatus, drawing method, drawing program and drawing integrated circuit
AssigneePanasonic Corporation
InventorDaisaku Kitagawa
Life of this patent
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Abstract
The present invention aims at, as to a drawing apparatus that stores an image in the frame memory via the cache memory, shortening the time period required for storing an entire image data in the frame memory. In the case where the frame memory is sectionalized in increments of the unit of pixels burst-transferred from the cache memory to the frame memory when partial data pieces of the image data to be eventually stored in the frame memory are stored in the cache memory, the drawing apparatus stores pixel data pieces for each sectionalized area in the cache memory in a manner that the cache memory needs to access the frame memory only once for each sectionalized area.
Claims8
A drawing apparatus that records image data in a frame memory, comprising:
- a cache memory;
- an area specifying unit operable to specify an area of the frame memory for recording the image data;
- a recording unit operable to (i) determine partial image data pieces in a case where the frame memory is sectionalized into blocks each having a same storage capacity and a consecutive address, each of the partial image data pieces being a part of the image data and being to be recorded in a corresponding one of blocks including therein the specified area, and (ii) record each of the determined partial image data pieces in the cache memory;
- and
- a memory-to-memory transfer control unit operable to carry out a burst transfer of each of the partial image data pieces recorded in the cache memory to the corresponding one of blocks within the frame memory.
A recording method for recording image data in a frame memory via a cache memory, comprising the steps of:
- specifying an area of the frame memory for recording the image data;
- determining partial image data pieces in a case where the frame memory is sectionalized into blocks each having a same storage capacity and a consecutive address, each of the partial image data pieces being a part of the image data and being to be recorded in a corresponding one of blocks including therein the specified area, and recording each of the determined partial image data pieces in the cache memory;
- and
- burst-transferring each of the partial image data pieces recorded in the cache memory to the corresponding one of blocks within the frame memory.
A recording program used in a drawing apparatus that records image data in a frame memory via a cache memory and causing a computer to execute the steps of:
- specifying an area of the frame memory for recording the image data;
- determining partial image data pieces in a case where the frame memory is sectionalized into blocks each having a same storage capacity and a consecutive address, each of the partial image data pieces being a part of the image data and being to be recorded in a corresponding one of blocks including therein the specified area, and recording each of the determined partial image data pieces in the cache memory;
- and
- burst-transferring each of the partial image data pieces recorded in the cache memory to the corresponding one of blocks within the frame memory.
A drawing integrated circuit that records image data in a frame memory via a cache memory, comprising;
- an area specifying unit operable to specify an area of the frame memory for recording the image data;
- a recording unit operable to (i) determine partial image data pieces in a case where the frame memory is sectionalized into blocks each having a same storage capacity and a consecutive address, each of the partial image data pieces being a part of the image data and being to be recorded in a corresponding one of blocks including therein the specified area, and (ii) record each of the determined partial image data pieces in the cache memory;
- and
- a memory-to-memory transfer control unit operable to carry out a burst transfer of each of the partial image data pieces recorded in the cache memory to the corresponding one of blocks within the frame memory.
Dependencies are inferred from the claim text.