Method and apparatus for partitioning allocation and management of jitter buffer memory for tdm circuit emulation applications
OwnerZohar Peleginventor
Life of this patent
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Abstract
A method for partitioning allocation and management of a jitter buffer memory for TDM circuit emulation applications comprises the steps of obtaining a channel hierarchy for a plurality of packet carrying channels having different channel rates, obtaining a packet sequential number, and using the channel hierarchy and the packet sequential number, generating a base-address in the jitter buffer memory. Each channel is allocated a space in the buffer memory that is proportional to its rate, and out-of-order packets are automatically reordered by the jitter buffer.
Claims19
A method for partitioning allocation and management of jitter buffer memory for TDM circuit emulation applications comprising the steps of:
- a. obtaining a channel hierarchy for a plurality of packet carrying channels having different channel rates;
- b. obtaining for each packet a respective packet sequential number;
- and
- c. generating a segment base-address in the jitter buffer memory using said channel hierarchy and said respective packet sequential number;
- whereby said partitioning allocation and management of the jitter buffer memory is correlated with said generated segment base-address such that each said channel is allocated a space in a buffer memory of a given size, said space being proportional to a respective said channel rate, and whereby out-of-order packets are automatically reordered by the jitter buffer.
A hierarchically partitioned jitter buffer memory comprising:
- a. a plurality of hierarchically arranged queues correlated with a channel hierarchy;
- and
- b. a mechanism for addressing said hierarchically arranged queues.
A method for partitioning allocation and management of jitter buffer memory for TDM circuit emulation applications comprising the steps of:
- a. obtaining a channel hierarchy for a plurality of packet carrying channels having different channel rates;
- b. dividing the jitter buffer memory into a plurality of hierarchically arranged queues;
- and
- c. allocating each said hierarchically arranged queue to a respective said channel so that said queue hierarchy follows said channel hierarchy;
- whereby the jitter buffer memory can be advantageously optimized for TDM emulation by a hierarchical partitioning that follows the SONET/SDH hierarchy.
Dependencies are inferred from the claim text.