Methods and apparatus for using memory
AssigneeInternational Business Machines Corporation
InventorsJohn Borkenhagen, Sudhir Dhawan, Philip Hillier, Joseph Kirscht, Randolph Kolvick
Life of this patent
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Abstract
In an aspect, a method is provided for using memory. The method includes the steps of (1) employing memory stacking, memory mirroring and memory interleaving in a total memory to reduce a number of memory entries that are written to an input/output (I/O) device while a portion of the total memory is replaced; and (2) storing data in the total memory. Numerous other aspects are provided.
Claims46
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A method, comprising:
- employing memory stacking and memory mirroring in a total memory to reduce a number of memory entries that are written to an input/output (I/O) device while a portion of the total memory is replaced;
- and
- storing data in the total memory;
- wherein the total memory includes a first plurality of memories coupled to respective memory ports in a first group of memory ports of a memory controller and a second plurality of memories coupled to respective memory ports in a second group of memory ports of the memory controller.
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A method, comprising:
- storing data in a total memory;
- employing memory stacking and memory mirroring in the total memory;
- and
- reducing a number of memory entries that are written to an input/output (I/O) device while a portion of the total memory is replaced;
- wherein the total memory includes a first plurality of memories coupled to respective ports in a first group of memory ports of a memory controller and a second plurality of memories coupled to respective memory ports in a second group of memory ports of the memory controller.
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An apparatus, comprising:
- a processor;
- an input/output (I/O) device;
- a memory controller, coupled to the processor and I/O device, including a first and second group of memory ports;
- and
- a total memory coupled to the memory controller, wherein the total memory include a first plurality of memories coupled to respective memory ports in the first group and a second plurality of memories coupled to respective memory ports in the second group;
- wherein the apparatus is adapted to:
- employ memory stacking and memory interleaving in the total memory to reduce a number of memory entries that are written to the input/output (I/O) device while a portion of the total memory is replaced;
- and
- store data in the total memory.
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Dependencies are inferred from the claim text.