Semiconductor device

A semiconductor device, comprising:

• a first pad;
• a second pad;
• a first main power source line having a first node, the first node coupled to the first pad;
• a second main power source line having a second node, the second node coupled to the second pad;
• a first sub power source line connected to a third node of the first main power source line;
• a second sub power source line connected to a fourth node of the second main power source line;
• an internal circuit coupled to the first and second sub power source line;
• a first protection element coupled to a fifth node between the first and third node of the first main power source line and a sixth node between the second and forth node of the second main power source line;
• and
• a second protection element coupled between the first sub power source line and the second power source line for protecting the internal circuit.

A method of designing a semiconductor device, comprising:

• (a) calculating an amount of current (Iesd) that flows between a power supply terminal and a ground terminal upon electrostatic discharge, a wiring resistance value (Rv) of an expected discharge path on a power supply potential side, a wiring resistance value (Rs) of an expected discharge path on a ground potential side, a clamp voltage (Vc) under operation of a power supply protective element, an effective operation resistive component (Rc) of the power supply protective element, an amount of a surge current (Iesd1) that flows into a terminal power supply protective element, and a breakdown voltage (Vx) of a gate insulating film of an internal circuit;
• (b) determining whether or not a voltage difference between a reference voltage terminal and a surge-applied terminal exceeds a gate oxide film breakdown voltage due to a surge current resulting from ESD, based on the calculation result in (a);
• (c) calculating, if it is determined in (b) that the voltage difference between the reference voltage terminal and the surge-applied terminal exceeds the gate oxide film breakdown voltage, a line resistance value (Rdv) of a predicted discharge path on the power supply potential side, a line resistance value (Rds) of a predicted discharge path on the ground potential side, an effective operation resistive component (Rdc) of the power supply protective element connected with at least one of a power supply branch line and a ground branch line, a clamp voltage (Vdc) under operation of the power supply protective element connected with at least one of a power supply branch line and a ground branch line, an amount of a surge current (Iesd1) that flows into a terminal power supply protective element upon formation of the internal power supply protective element, and an amount of a surge current (Iesd2) that flows into the internal power supply protective element;
• and
• (d) forming the internal power supply protective element in a portion where the voltage difference between the reference voltage terminal and the surge-applied terminal does not exceed the gate oxide film breakdown voltage based on the calculation result in (c).