Self-addressed subarray precharge
AssigneesUnited Memories, Inc., Sony Corporation
InventorKim Hardee
Life of this patent
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Abstract
Power consumption in an integrated circuit memory is reduced by lowering the power supply demand from an on-chip pumped VCCP power source. Only the row decoders for subarrays in a memory bank that were previously activated are precharged in response to a bank precharge command. Additional circuitry is provided to the precharge clock generator circuit. The additional circuitry includes a latch that is set when an array select signal is asserted, and reset when a precharge operation for that bank occurs.
Claims20
A memory comprising:
- at least one memory bank including a plurality of subarrays;
- a plurality of row decoder circuits associated with the subarrays in the at least one memory bank;
- and
- means for precharging only the row decoder circuits in a subarray that have been previously activated.
A memory comprising:
- at least one memory bank including a plurality of subarrays;
- a plurality of row decoder circuits associated with the subarrays in the at least one memory bank;
- and
- a precharge clock generator circuit for precharging only the row decoder circuits in a subarray that have been previously activated.
A method for operating a memory having at least one memory bank including a plurality of subarrays and a plurality of row decoder circuits associated with the subarrays in the at least one memory bank, the method comprising precharging only the row decoder circuits in a subarray that have been previously activated.
Dependencies are inferred from the claim text.