Low noise lowpass filter

A lowpass filter comprising:

• first and second power supply terminals;
• a positive input terminal and a negative input terminal;
• a positive output terminal and a negative output terminal;
• a plurality of differential biquad filters powered between said first and second power supply terminals and connected with each other between the input and output terminals;
• said positive and negative input terminals corresponding to input terminals of a first of said plurality of differential biquad filters, while said positive and negative output terminals corresponding to output terminals of a last of said plurality of differential biquad circuits, each of the differential biquad filters including:
• a positive single ended circuit;
• a negative single ended circuit, each of the single ended circuits comprising:
• a single input terminal;
• a transistor having a control terminal, and first and second main terminals;
• a single output terminal corresponding to the control terminal of said transistor;
• first and second conductances connected between said single input terminal and the control terminal of said transistor and connected to each other at a first node;
• a first current source connected between said first power supply terminal and the first main terminal of said transistor;
• a second current source connected between the second main terminal of said transistor and said second power supply terminal;
• a first capacitance connected between the control terminal of said transistor and the second main terminal of the transistor of the other single ended circuit;
• a second capacitance connected between the first node and said second main terminal of said transistor;
• said first main terminal being further connected to the first node of the other single ended circuit;
• and
• a third capacitance connected between the second main terminals of the transistors of the single ended circuit.

A differential biquad filter, comprising:

• first and second power supply terminals;
• first and second input terminals;
• a first transistor connected between the power supply terminals, the first transistor including a control terminal connected to the first input terminal, a first conduction terminal connected to the second input terminal, and a second conduction terminal;
• a second transistor connected between the power supply terminals, the second transistor including a control terminal connected to the second input terminal, a first conduction terminal connected to the first input terminal, and a second conduction terminal;
• and
• a first capacitance connected between the second conduction terminals.