Circuit and method for determining optimal power and frequency metrics of an integrated circuit

Circuitry for delay replication to determine optimal power and frequency metrics in an integrated circuit, comprising:

• a first delay portion having an output signal that represents a delay replication curve representing a predetermined approximation of maximum delay of critical paths in the integrated circuit at a plurality of operating voltages, the first delay portion used to form a first voltage dependent delay replication curve specific to the integrated circuit;
• and
• a second delay portion coupled in series with the first delay portion, the second delay portion selectively adding additional delay, the first delay portion and the second delay portion used to form a second voltage dependent delay replication curve specific to the integrated circuit;
• and
• control circuitry coupled to the first delay portion and the second delay portion, the control circuitry:
• (1) determining a first voltage and frequency operating point on the first voltage dependent delay replication curve specific to the integrated circuit;
• and (2) transitioning the integrated circuit from the first voltage and frequency operating point to an optimal voltage and frequency operating point corresponding to a lower supply voltage operation of the integrated circuit by transitioning frequency at least once without operating below a predetermined margin frequency associated with the first voltage dependent delay replication curve by transitioning through at least one voltage and frequency operating point on the second voltage dependent delay replication curve.

A method for determining optimal power and frequency metrics in an integrated circuit, comprising:

• providing a delay replication circuit having an output signal that represents a set of voltage dependent delay replication curves specific to the integrated circuit, the set comprising at least a first voltage dependent delay replication curve, a second voltage dependent delay replication curve, and a third voltage dependent delay replication curve, each of the voltage dependent delay replication curves representing a predetermined approximation of maximum delay of critical paths in the integrated circuit at a plurality of operating voltages;
• using the output signal to determine a first voltage and frequency operating point on the first voltage dependent delay replication curve;
• selectively adding delay in the delay replication circuit to transition from the first voltage and frequency operating point to a first intermediate voltage and frequency operating point located on the third voltage dependent delay replication curve;
• reducing supply voltage of the integrated circuit a first predetermined amount;
• determining frequency of the output signal of the delay replication circuit to obtain a determined frequency;
• modifying frequency of the integrated circuit to the determined frequency corresponding to a second intermediate voltage and frequency operating point that is located on the second voltage dependent delay replication curve;
• reducing supply voltage of the integrated circuit a second predetermined amount;
• and
• removing the delay that was selectively added, the removing completing transitioning of frequency of operation and supply voltage of the integrated circuit to an optimal value.