Method and circuit for filtering glitches

A circuit for filtering glitches that corrupt a digital input signal, the circuit comprising:

• an enable path input with the digital input signal and a reset signal, generating an output signal active when the reset signal is null and the digital input signal assumes a logic active value, or a null when the reset signal is asserted;
• a delay line producing an internal signal as a delayed replica of the output signal;
• and
• a disable path enabled or disabled by the internal signal, which receives the digital input signal and, when enabled, asserts the reset signal when the digital input signal becomes null.

A filtering circuit comprising:

• an enable path input with a digital signal and a reset signal for generating an output signal defining
• an output signal active when the reset signal is null and the digital signal assumes a logic active value, or
• a null output signal when the reset signal is asserted;
• a delay line for producing an internal signal as a delayed replica of the output signal;
• and
• a disable path enabled or disabled by the internal signal, which receives the digital input signal, and, when enabled, asserts the reset signal when the digital signal becomes null;
• said enable path and said disable path generating the null output signal and the reset signal when an external command is asserted.

A method for filtering glitches comprising:

• generating an active output signal when a digital input signal assumes an active logic value, or a null output signal when a reset signal is asserted;
• generating an internal signal as a delayed replica of the output signal;
• and
• asserting the reset signal when the internal signal is active and the digital input signal becomes null.