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US 2006/0186922 A1Published application
Translator circuit and method therefor
AssigneeSemiconductor Components Industries, LLC
InventorAntonin Rozsypal
Life of this patent
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Abstract
In one embodiment, a voltage translator is configured to sense a change in a value of a supply voltage to the translator and responsively inhibit the translator from changing a state of the output of the translator.
Claims18
A method of forming a translator comprising:
- configuring the translator to receive an input signal and shift a voltage value of the input signal to form an output signal operably coupled to control a power transistor coupled to an inductive load;
- and
- configuring the translator to receive a supply voltage and inhibit the output signal from changing state responsively to a change in a value of the supply voltage.
A translator comprising:
- a first transistor coupled to receive an input signal having a first maximum voltage value and form an output signal having a second maximum voltage value that is greater than the first maximum voltage value;
- and
- a second transistor coupled to inhibit the translator from changing a state of the output signal responsively to sensing a first change in a value of an input voltage received by the translator.
A method for shifting a voltage level of a signal comprising:
- receiving an input signal;
- increasing a voltage value of the input signal to form an output signal;
- receiving a supply voltage having a first value;
- sensing a change in the first value of the supply voltage;
- and
- enabling a clamping circuit to disable the output signal from changing state responsively to detecting the change in the first value of the supply voltage.
3 more elements
Dependencies are inferred from the claim text.