# US 2006/0186510 A1 · Strained-semiconductor-on-insulator bipolar device structures

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- Number: US 2006/0186510 A1
- Document ID: US20060186510A1
- Status: Published application
- Kind: A1
- Application number: 11/412,276
- Filed: 2006-04-27
- Published: 2006-08-24
- Earliest claimed: 2002-06-07
- Assignees: AmberWave Systems Corporation
- Inventors: Anthony Lochtefeld; Thomas Langdo; Richard Hammond; Matthew Currie; Glyn Braithwaite; Eugene Fitzgerald
- Web page: https://patentgrep.com/patent/US20060186510A1

## CPC

- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/0323: {comprising monocrystalline silicon}
- H10D 30/0516: {of FETs having PN heterojunction gates}
- H10D 30/6741: {Group IV materials, e.g. germanium or silicon carbide (TFTs having oxide semiconductors H10D30/6755)}
- H10D 30/6748: {having a multilayer structure or superlattice structure}
- H10D 30/6758: {characterised by the insulating substrates}
- H10D 30/791: {Arrangements for exerting mechanical stress on the crystal lattice of the channel regions}
- H10D 86/01: Manufacture or treatment
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10P 90/1906: {Preparing SOI wafers}
- H10P 90/1916: {with separation or delamination along an ion implanted layer, e.g. Smart-cut}
- H10P 90/1924: {with separation/delamination along a porous layer}
- H10W 10/061: {using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations}
- H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers}
- H10P 90/1914: {using bonding}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.

## Claims

### Claim at position 1

1-34. (canceled)

### Claim 35

A structure comprising:
a strained semiconductor layer disposed over a dielectric layer; and
a bipolar transistor including:
a collector disposed in a portion of the strained semiconductor layer,
a base disposed in contact with the collector and over the strained semiconductor layer, and
an emitter disposed over the base.

### Claim 36 (depends on 35)

The structure of claim 35, wherein the strained layer is tensilely strained.

### Claim 37 (depends on 36)

The structure of claim 36, wherein the strained layer comprises tensilely strained silicon.

### Claim 38 (depends on 35)

The structure of claim 35, wherein the strained layer is compressively strained.

### Claim at position 6

39-62. (canceled)

### Claim 63 (depends on 35)

The structure of claim 35, wherein the strained semiconductor layer is in contact with the dielectric layer.

### Claim 64 (depends on 35)

The structure of claim 35, wherein the base comprises a substantially relaxed semiconductor material.

### Claim 65 (depends on 64)

The structure of claim 64, wherein the substantially relaxed semiconductor material comprises at least one of silicon and germanium.

### Claim 66 (depends on 35)

The structure of claim 35, wherein the base comprises a compressively strained semiconductor material.

### Claim 67 (depends on 66)

The structure of claim 66, wherein the compressively strained semiconductor comprises at least one of silicon and germanium.

### Claim 68 (depends on 35)

The structure of claim 35, wherein the base comprises a tensilely strained semiconductor material.

### Claim 69 (depends on 68)

The structure of claim 68, wherein the tensilely strained semiconductor material comprises at least one of silicon and germanium.

### Claim 70 (depends on 35)

The structure of claim 35, wherein the base is doped.

### Claim 71 (depends on 70)

The structure of claim 70, wherein the doped base comprises dopants and an element, and the element suppresses outdiffusion of the dopants from the base.

### Claim 72 (depends on 35)

The structure of claim 35, wherein the base comprises SiGe, and a concentration of Ge in the SiGe has a non-uniform profile across a thickness of the base.

### Claim 73 (depends on 72)

The structure of claim 72, wherein the profile is selected from the group consisting of graded, trapezoidal, and triangular.

### Claim 74 (depends on 35)

The structure of claim 35, wherein the emitter comprises a substantially relaxed semiconductor.

### Claim 75 (depends on 74)

The structure of claim 74, wherein the substantially relaxed semiconductor comprises at least one of silicon and germanium.

### Claim 76 (depends on 35)

The structure of claim 35, wherein the emitter comprises a tensilely strained semiconductor material.

### Claim 77 (depends on 76)

The structure of claim 76, wherein the tensilely strained semiconductor material comprises at least one of silicon and germanium.