Back to results
US 2006/0186484 A1Published application
Field effect transistor with narrow bandgap source and drain regions and method of fabrication
AssigneeIntel Corporation
InventorsRobert Chau, Suman Datta, Jack Kavalieros, Justin Brask, Mark Doczy, Matthew Metz
Life of this patent
Estimating the term…
Abstract
A transistor having a narrow bandgap semiconductor source/drain region is described. The transistor includes a gate electrode formed on a gate dielectric layer formed on a silicon layer. A pair of source/drain regions are formed on opposite sides of the gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film formed in the silicon layer on opposite sides of the gate electrode.
Claims34
A transistor comprising:
- a gate electrode formed on a gate dielectric layer formed on a silicon layer;
- and
- a pair of source/drain regions formed on opposite sides of said gate electrode, said pair of source/drain regions comprising a narrow bandgap semiconductor film.
A transistor comprising:
- a gate dielectric layer formed on a first surface of a silicon layer;
- a gate electrode having a pair of laterally opposite sidewalls formed on said gate dielectric layer;
- a pair of sidewall spacers formed adjacent to said pair of laterally opposite sidewalls of said gate electrode;
- a pair of source/drain regions formed from an epitaxial narrow bandgap semiconductor film having a work function of less than 0.75 eV and a electron mobility greater than 10,000 cm2V−1s−1 wherein said narrow bandgap semiconductor extends beneath said gate dielectric layer and has a top surface extending above said first surface of said silicon layer;
- and
- a pair of non-alloyed contacts in direct contact with said low bandgap semiconductor.
3 more elements
A method of forming a transistor comprising:
- forming a gate electrode on a gate dielectric layer formed on a silicon layer;
- and
- forming a pair of source/drain regions on opposite sides of said gate electrode wherein said pair of source/drain regions comprise a narrow bandgap semiconductor film.
A method of forming a transistor comprising:
- forming a gate dielectric layer on a first surface of a silicon layer;
- forming a gate electrode on said gate dielectric layer, said gate electrode having a pair of laterally opposite sidewalls;
- forming a pair of sidewall spacers adjacent to said sidewalls of said gate electrode;
- etching a pair of recesses into said silicon layer adjacent to said outside edges of said sidewall spacers and beneath said gate electrode formed on said gate dielectric layer;
- and
- depositing a narrow bandgap semiconductor film in said recesses.
3 more elements
Dependencies are inferred from the claim text.