Split gate flash memory device having self-aligned control gate and method of manufacturing the same

A flash memory device comprising:

• a semiconductor substrate having a pair of drain regions and a source region formed between the pair of drain regions;
• a pair of spacer-shaped control gates each formed on the semiconductor substrate between the source region and each of the drain regions;
• and
• a storage node formed in a region between each control gate and the semiconductor substrate,
• wherein a bottom surface of each control gate includes a first region that overlaps with the semiconductor substrate and a second region that overlaps with the storage node,
• wherein the pair of spacer-shaped control gates are substantially symmetrical with each other about the source region.

A method of manufacturing a flash memory device, the method comprising:

• forming a storage node layer on a semiconductor substrate;
• forming a dummy layer within the storage node layer to separate the storage node layer into at least two storage nodes;
• and
• forming spacer-shaped control gates on both sidewalls of the dummy layer so that each control gate covers a sidewall and a top surface of a corresponding storage node.