NVM cell on SOI and method of manufacture

A method of making a non-volatile memory (NVM) device on a semiconductor-on-silicon (SOI) substrate comprising a semiconductor portion on an insulator portion, comprising:

• forming a gate stack over the semiconductor portion, the gate stack comprising a control gate and a storage layer, wherein the storage layer is between the control gate and the semiconductor portion.
• masking a drain side of the gate stack to leave open a source side of the gate stack;
• while masking the drain side, implanting neutral impurities into the semiconductor portion in the source side, wherein at least a portion of the impurities reside at a first depth, wherein the defect density at the first depth is increased by at least a factor of one hundred;
• and
• implanting the source side with first acceptor/donor impurities to a second depth, wherein the first depth is closer to the insulator portion than the second depth.

A method of making a non-volatile memory (NVM) device, comprising:

• providing a semiconductor-on-insulator (SOI) substrate having a semiconductor portion and an insulator portion under the semiconductor portion;
• providing a gate over the SOI substrate;
• providing a storage layer between the gate and the SOI substrate;
• masking the semiconductor portion on a drain side of the gate;
• and
• while masking the semiconductor portion, implanting neutral impurities into a source side of the gate to form an electron/hole recombination region.