Array substrate, display apparatus having an array substrate, and method for manufacturing an array substrate
AssigneeSamsung Electronics Co., Ltd.
InventorsSeong-Yong Hwang, Kyoung-Ju Shin, Weon-Sik Oh
Life of this patent
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Abstract
A substrate includes an array area and a data pad area adjacent to the array area. A gate line, a data line and a switching device are formed in the array area of the substrate. A data pad extending from an end of the data line and a supporter provided between the substrate and the data pad are provided in a data pad area to allow the data pad to be placed at a higher position than a passivation layer. Thus, a contact resistance occurring between an anisotropic conductive film and a bump and a contact resistance occurring between the anisotropic conductive film and the data pad are reduced.
Claims21
An array substrate, comprising:
- a substrate having an array area and a data pad area that is adjacent to the array area;
- a gate line provided at the array area;
- a data line provided at the array area, the data line being electrically insulated from the gate line;
- a switching device coupled with the gate line and the data line;
- a data pad provided at an end of the data line and formed at the data pad area;
- and
- a supporter provided between the data pad and the substrate, the supporter supporting the data pad.
A method for manufacturing an array substrate, comprising:
- patterning a first metal layer to form a gate line and a gate electrode in an array area of a substrate;
- forming an insulating layer over the gate line and the gate electrode;
- forming a channel layer on the insulating layer at a data pad area that is adjacent to the array area to form the gate electrode and a supporter;
- and
- patterning a second metal layer on the insulating layer corresponding to the array layer to form a data line, a source electrode extending from the data line and crossing the channel layer, a drain electrode spaced apart from the source electrode and crossing the channel layer, and a data pad extending from an end of the data line to cover the supporter.
A method for manufacturing an array substrate, comprising:
- patterning a first metal layer to form a gate line and a gate electrode in an array area of a substrate;
- forming an insulating layer over the gate line and the gate electrode;
- sequentially depositing an amorphous silicon layer, an N+ amorphous silicon layer, and a second metal layer on the insulating layer;
- and
- patterning the second metal layer, the N+ amorphous silicon layer and the amorphous silicon layer to form a data line, a channel layer crossing the gate electrode, a source electrode extending from the data line and crossing the channel layer, a drain electrode spaced apart from the source electrode and crossing the channel layer at the array area, and a supporter and a data pad on the supporter at a data pad area that is adjacent to the array area.
Dependencies are inferred from the claim text.