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US 2006/0150194 A1Published application
Methods and apparatuses to maintain multiple execution contexts
OwnerBin Xing, Yi Cheninventors
Life of this patent
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Abstract
A method, apparatus, and system in which a two or more execution contexts of threads are maintained simultaneously using stack switching in an operating environment in which merely one thread can be executed at a given point in time. Execution of instructions in a callee thread is suspended and the execution context including a return address location of a pointer of the callee stack is maintained while instructions are being executed in a caller thread.
Claims20
A method, comprising:
- maintaining two or more execution contexts of threads simultaneously using stack switching in an operating environment in which merely one thread can be executed at a given point in time;
- and
- suspending execution of instructions in a callee thread and still maintaining the execution context including a return address location of a pointer of the callee stack while instructions are being executed in a caller thread.
A computer readable medium storing instructions to cause a machine to perform the following operations, comprising:
- suspending and explicitly giving up execution of instructions in a first thread when a first thread calls to a second thread;
- and
- storing an execution context of the first thread including data, parameters, and an address of a pointer on the first stack while instructions are being executed in the second thread.
A system, comprising:
- a first memory area dedicated to storing a first execution context of a first thread;
- a second memory area dedicated to storing a second execution context of a second thread;
- and
- firmware embedded with a routine to direct storing an execution context of the first thread including an address of a pointer on the first memory area, to initiate an execution of instructions in a second thread when the first thread initiates a call to the second thread, and to direct storing an execution context of the second thread including an address of a pointer on the second memory area.
1 more element
Dependencies are inferred from the claim text.