Parity signal generator
AssigneeMagnaChip Semiconductor, Ltd.
InventorsMoon-Seok Yang, Myung-Woo Lee
Life of this patent
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Abstract
Provided is a parity signal generator for generating a parity signal by continuously detecting a horizontal sync signal. The parity signal generator includes a first detecting unit for generating a first detection signal by detecting whether the number of a horizontal sync signal is odd or even during an activation of a vertical sync signal; a second detecting unit for generating a second detection signal by detecting whether the number of the horizontal sync signal is odd or even during an inactivation of the vertical sync signal; and an output unit for receiving the first and second detection signals to output a parity signal.
Claims13
A parity signal generator, comprising:
- a first detecting unit for generating a first detection signal by detecting whether the number of a horizontal sync signal is odd or even during an activation of a vertical sync signal;
- a second detecting unit for generating a second detection signal by detecting whether the number of the horizontal sync signal is odd or even during an inactivation of the vertical sync signal;
- and
- an output unit for receiving the first and second detection signals to output a parity signal.
A display device, comprising:
- a panel for displaying an image data in response to a horizontal sync signal and a vertical sync signal;
- and
- a driver including a parity signal generator, for transferring the image data with the horizontal sync signal and the vertical sync signal based on a parity signal, wherein the parity signal generator generates the parity signal by detecting whether the horizontal sync signal is even or odd according to a status of the vertical sync signal.
Dependencies are inferred from the claim text.