Apparatus and method for accommodating different central processing units in a computer
OwnerMatt Hageman, Bradley Tannerinventors
Life of this patent
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Abstract
A computer may use either of two types of central processing units having similar boot vectors by detecting which type of processor is present and dynamically adjusting, if necessary, the initialization-instruction address signals associated with one or the other type. Detecting which type of processor is present may be performed before boot time, while the computer is in a standby power state, or while system power is turned on but before the first initialization instruction has been fetched.
Claims25
A computer, comprising:
- a central processing unit that is one of a first type and a second type compatible with a socket, the first and second types having boot vectors that lie within a common address block;
- a memory containing disjoint first and second sets of initialization instructions for the first and second types, respectively;
- CPU detection logic that determines the type of the central processing unit;
- and
- address adjustment logic that adjusts initialization-instruction address signals to point to the first set, when the CPU detection logic determines that the central processing unit is of the first type.
A computer, comprising:
- processing means that is one of a first type and a second type compatible with a socket, the first and second types having boot vectors that lie within a common address block;
- means for storing disjoint first and second sets of initialization instructions for the first and second types, respectively;
- means for detecting the type of the processing means;
- and
- means for adjusting initialization-instruction address signals to point to the first set, when the means for detecting the type of the processing means determines that the processing means is of the first type.
A method for accommodating different types of central processing units in a single computer, comprising:
- detecting that a central processing unit is one of a first type and a second type, the first and second types having boot vectors that lie within a common address block;
- and
- altering initialization-instruction address signals associated with the first type to point to a first portion of a memory containing initialization instructions, when the central processing unit is detected to be of the first type, the first portion being disjoint from a second portion of the memory, the second portion being associated with the second type.
Dependencies are inferred from the claim text.