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US 2006/0149936 A1Published application
Processor core interface for external hardware modules and methods thereof
AssigneeCeva D.S.P. Ltd.
InventorsMichael Boukaya, Roy Glasner, Eran Briman
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Abstract
A processor core architecture includes a cluster having at least a register file and predefined functional units having access to the register file. The architecture also includes an interface to one or more arbitrary functional units external to the processor core. The interface is to provide the arbitrary functional units with access to the register file.
Claims11
A method comprising:
- providing a processor core architecture having a cluster, said cluster including a register file and predefined functional units having access to said register file;
- and
- providing in said processor core architecture an interface to one or more arbitrary functional units external to said processor core, where said interface is to provide said arbitrary functional units with said access to said register file.
A processor core comprising:
- a cluster including at least:
- a register file;
- a register file controller coupled to said register file and including a synchronization block for an arbitrary functional unit external to said processor core, where said synchronization block is to receive results of operations from a function block of said arbitrary functional unit and to write said results into said register file;
- and
- a first predefined functional unit including at least:
- first control circuitry able to determine, from an encoded version of an operation, to which register of said register file to write a result of said operation, said first control circuitry also able to fetch operands of said operation from said register file and to control timing of receipt of said operands by said function block and timing of writing of said result by said synchronization block.
3 more elements
Dependencies are inferred from the claim text.