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US 2006/0149931 A1Published application
Runahead execution in a central processing unit
OwnerAkkary Haitham, Doron Orenstein +2inventors
InventorsAkkary Haitham, Doron Orenstein, Ravi Rajwar, Srikanth Srinivasan
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Abstract
According to one embodiment, a method is disclosed. The method includes detecting a load miss at a central processing unit (CPU), stalling a read only buffer (ROB), speculatively retiring an instruction causing the ROB stall and subsequent instructions, keeping registers that have not been renamed in the ROB upon retirement, and flushing the CPU pipeline upon receiving data from the load miss.
Claims23
A method comprising:
- detecting a load miss at a central processing unit (CPU);
- stalling a reorder buffer (ROB);
- speculatively retiring an instruction causing the ROB stall and subsequent instructions;
- keeping registers that have not been renamed in the ROB upon retirement;
- and
- flushing the CPU pipeline upon receiving data from the load miss.
3 more elements
A computer system comprising:
- a main memory device, and
- a central processing unit (CPU), coupled to the main memory device, including:
- a read only buffer (ROB);
- a register file;
- and
- and execution unit to perform speculative runahead execution by stalling the ROB.
3 more elements
A central processing unit (CPU) comprising:
- a read only buffer (ROB);
- and
- a register file;
- and
- and execution unit to perform speculative runahead execution by stalling the ROB.
2 more elements
Dependencies are inferred from the claim text.