Processor with automatic scheduling of operations
AssigneeST Microelectronics SA
InventorStefano Cervini
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AssigneeST Microelectronics SA
InventorStefano Cervini
Estimating the term…
A high speed processor. The processor includes terminals that each execute a subset of the instruction set. In at least one of the terminals, the instructions are executed in an order determined by data flow. Instructions are loaded into the terminal in pages. A notation is made when an operand for an instruction is generated by another instruction. When operands for an instruction are available, that instruction is a “ready” instruction. A ready instruction is selected in each cycle and executed. To allow data to be transmitted between terminals, each terminal is provided with a receive station, such that data generated in one terminal may be transmitted to another terminal for use as an operand in that terminal. In one embodiment, one terminal is an arithmetic terminal, executing arithmetic operations such as addition, multiplication and division. The processor has a second terminal, which contains functional logic to execute all other instructions in the instruction set. The invention is useful for arithmetic intensive applications, such as graphic processors.
A method of operating a processor to execute a plurality of instructions, each instruction operating on at least one operand associated with the instruction, the method comprising:
A method of operating a processor to execute a plurality of instructions, each instruction having at least a first and a last operand associated therewith, the method comprising:
A method of operating a processor of the type having:
A computer readable medium having stored thereon on a data structure comprising a plurality of entries, each entry representing an expression to be evaluated by functional logic to produce a result, and each entry comprising a first field indicating an entry in the data structure representing a first expression that requires the result as an operand.
Dependencies are inferred from the claim text.