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US 2006/0149914 A1Published application
Systems and methods for allocating data structures to memories
OwnerTom Dorisinventor
Life of this patent
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Abstract
Systems and methods allocate data structures to memories coupled to a processor. The allocation may be based on system aspects such as memory size constraints, bandwidth constraints, and memory latency. Further aspects that may be included in the allocation decision are minimization of wasted bandwidth and task priorities. A constraint satisfaction algorithm with an objective function may be used to determine a desirable allocation.
Claims30
A method comprising:
- determining a memory access bandwidth for each of a plurality of data structures, each of the data structures having a data structure size;
- determining a storage size constraint for each of a plurality of memories, each of the memories having a memory size;
- determining a bus bandwidth constraint for each bus accessing the plurality of memories, each bus having a bus bandwidth;
- and
- determining an allocation of the data structures to the plurality of memories using the storage size constraint and the bus bandwidth constraint in a constraint satisfaction algorithm having an objective function to determine allocation fitness.
2 more elements
An apparatus comprising:
- a processor and a plurality of memories, each of the memories having a memory size;
- at least one task executable on the processor;
- and
- a plurality of data structures associated with the at least one task, each of the data structures having a data structure size;
- wherein data structures are allocated to a memory of the plurality of memories in accordance with a storage size constraint, a bus bandwidth constraint and an objective function.
2 more elements
A machine-readable medium having machine readable instructions for executing a method, the method comprising:
- determining a memory access bandwidth for each of a plurality of data structures, each of the data structures having a data structure size;
- determining a storage size constraint for each of a plurality of memories, each of the memories having a memory size;
- determining a bus bandwidth constraint for each bus accessing the plurality of memories, each bus having a bus bandwidth;
- and
- determining an allocation of the data structures to the plurality of memories using the storage size constraint and the bus bandwidth constraint in a constraint satisfaction algorithm having an objective function to determine allocation fitness.
2 more elements
A system comprising:
- an SRAM (Static Random Access) memory;
- at least one task having a plurality of data structures allocatable to a plurality of memories, said plurality including the SRAM memory, each of the memories having a memory size;
- and
- an allocation analysis tool operable to:
- determine a memory access bandwidth for each of a plurality of data structures, each of the data structures having a data structure size;
- determine a storage size constraint for each of a plurality of memories, each of the memories having a memory size;
- determine a bus bandwidth constraint for each bus accessing the plurality of memories, each bus having a bus bandwidth;
- and
- determine an allocation of the data structures to the plurality of memories using the storage size constraint and the bus bandwidth constraint in a constraint satisfaction algorithm having an objective function to determine allocation fitness.
6 more elements
Dependencies are inferred from the claim text.