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US 2006/0149893 A1Published application
Data storage management for flash memory devices
AssigneeIntel Corporation
InventorsDale Barfuss, Suresh Nagarajan
Life of this patent
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Abstract
Logical units of allocation may be designated as overhead and unallocated and made unavailable for use. During one or more write operations, when one or more logical unit is invalidated, one or more of the unallocated overhead logical units may be designated as available for use and one or more of the invalidated logical units may be designated as overhead.
Claims23
A method comprising:
- designating a first set of logical units in an erase block as units available for storing data;
- designating a second set of logical units in the erase block as overhead units;
- changing the designation of one or more of the second set of logical units from overhead units to units available for storing data in response to one or more of the first set of logical units being marked as dirty or invalid;
- and
- changing the designation of the one or more of the first set of logical units marked as dirty or invalid from units available for storing data to overhead units.
2 more elements
An apparatus comprising:
- an array of memory cells grouped as multiple erase blocks, each erase block having multiple logical units;
- a control agent coupled with the array of memory cells to control a state corresponding to each of the multiple logical units, wherein the control unit is configured to designate a first set of logical units in a selected erase block as units available for storing data, designate a second set of logical units in the erase block as overhead units, change the designation of one or more of the second set of logical units from overhead units to units available for storing data in response to one or more of the first set of logical units being marked as dirty or invalid, and change the designation of the one or more of the first set of logical units marked as dirty or invalid from units available for storing data to overhead units.
A system comprising:
- a substantially omni-directional antenna;
- a processor coupled with the antenna;
- an array of memory cells grouped as multiple erase blocks, each erase block having multiple logical units;
- a control agent coupled with the array of memory cells and the processor to control a state corresponding to each of the multiple logical units, wherein the control unit is configured to designate a first set of logical units in a selected erase block as units available for storing data, designate a second set of logical units in the erase block as overhead units, change the designation of one or more of the second set of logical units from overhead units to units available for storing data in response to one or more of the first set of logical units being marked as dirty or invalid, and change the designation of the one or more of the first set of logical units marked as dirty or invalid from units available for storing data to overhead units.
1 more element
Dependencies are inferred from the claim text.