Methods and apparatus for list transfers using DMA transfers in a multi-processor system
AssigneeSony Computer Entertainment Inc.
InventorsTakeshi Yamazaki, Tsutomu Horikawa, James Kahle, Charles Johns, Michael Day, Peichun Liu
Life of this patent
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Abstract
Methods and apparatus provide for transferring a plurality of data blocks between a shared memory and a local memory of a processor in response to a single DMA command issued by the processor to a direct memory access controller (DMAC), wherein the processor is capable of operative communication with the shared memory and the DMAC is operatively coupled to the local memory.
Claims39
An apparatus, comprising:
- a processor capable of operative communication with a shared memory and including a local memory that is adapted for execution of instructions therein;
- and
- a direct memory access controller (DMAC) coupled to the local memory of the processor and operable to facilitate transfer of a plurality of data blocks between the shared memory and the local memory in response to a single DMA command issued by the processor.
An apparatus, comprising:
- a plurality of parallel processors capable of operative communication with a shared memory, each processor including:
- a local memory that is adapted for execution of instructions therein, and a direct memory access controller (DMAC) coupled to the local memory of the processor,
- wherein the DMAC of each processor is operable to facilitate transfer of a plurality of data blocks between the shared memory and the local memory in response to a single DMA command issued by the processor.
An apparatus, comprising:
- a plurality of parallel processors capable of operative communication with a shared memory, each processor including:
- a local memory that is not a hardware cache memory and is adapted for execution of instructions therein, and a direct memory access controller (DMAC) coupled to the local memory of the processor;
- and
- a main processor operatively coupled to the processors, capable of being coupled to the shared memory, and operable to manage the plurality of processors,
- wherein the DMAC of each processor is operable to facilitate transfer of a plurality of data blocks between the shared memory and the local memory in response to a single DMA command issued by the processor.
A method, comprising transferring a plurality of data blocks between a shared memory and a local memory of a processor in response to a single DMA command issued by the processor to a direct memory access controller (DMAC), wherein the processor is capable of operative communication with the shared memory and the DMAC is operatively coupled to the local memory.
A storage medium containing a software program, the software program being operable to cause a processor to execute actions including transferring a plurality of data blocks between a shared memory and a local memory of a processor in response to a single DMA command issued by the processor to a direct memory access controller (DMAC), wherein the processor is capable of operative communication with the shared memory and the DMAC is operatively coupled to the local memory.
Dependencies are inferred from the claim text.