Storage controller and method for storage control

A recording medium to which a program for a processor which realizes data redundancy by controlling the distribution and storage of a stripe, comprising N number of data strips and M number of parity strips of different types to N+M number of memory devices, is recorded, wherein the program enables the processor to execute processing for;

• determining the storage destination memory devices for the N number of data strips and the M number of parity strips comprised in each stripe so that the parity strips are not continuously stored in the same memory device between two consecutive stripes when said N+M number of memory devices store a plurality of stripes;
• and
• storing said N number of data strips and two or more parity strips to each of the determined storage destination memory devices.

A storage control method for realizing data redundancy by distributing and storing a stripe comprising N number of data strips and M number of parity strips of different types to N+M number of memory devices, wherein the method:

• determines storage destination memory devices for the N number of data strips and the M number of parity strips comprised in each stripe so that the parity strips are not continuously stored to the same memory device between two consecutive stripes when said N+M number of memories store a plurality of stripes;
• and
• stores the N number of data strips and two or more parity strips to each of the determined storage destination memory devices.

A carrier signal which carries a program for a processor which realizes data redundancy by controlling the distribution and storage of a stripe comprising N number of data strips and M number of parity strips of different types in N+M number of memory devices, wherein said program enables the processor to execute processing for:

• determining storage destination memory devices for the N number of data strips and the M number of parity strips comprised in each stripe so that the parity strips are not continuously stored to the same memory device between two consecutive stripes when said N+M number of memory devices store a plurality of stripes;
• and
• storing said N number of data strips and two or more parity strips to each of the determined storage destination memory devices.

A storage controller for realizing data redundancy by controlling the distribution and storage of a stripe comprising N number of data strips and M number of parity strips of different types in N+M number of memory devices, comprising:

• a determination means for determining the storage destination memory devices of the N number of data strips and the M number of parity strips comprised in each stripe so that the parity strips are not continuously stored to the same memory device between two consecutive stripes when said N+M number of memories store a plurality of stripes;
• and
• a control means for controlling the storage of said N number of data strips and two or more parity strips to each of the determined storage destination memories.