Managing shared memory access
OwnerUday Naikinventor
Life of this patent
Estimating the term…
Abstract
Managing access to shared memory by a plurality of access entities includes storing a first identifier in a first storage location, the first identifier identifying a data structure in the shared memory; storing a second identifier in a second storage location associated with the first storage location, the second identifier identifying a first access entity; storing the second identifier for access by a second access entity; and signaling the first access entity by the second access entity, before the first access entity accesses the data structure.
Claims26
A method for managing access to shared memory by a plurality of access entities, comprising:
- storing a first identifier in a first storage location, the first identifier identifying a data structure in the shared memory;
- storing a second identifier in a second storage location associated with the first storage location, the second identifier identifying a first access entity;
- storing the second identifier for access by a second access entity;
- and
- signaling the first access entity by the second access entity, before the first access entity accesses the data structure.
A method for managing access to shared memory by a plurality of access entities, comprising:
- storing a linked list of values identifying access entities waiting to access a data structure in the shared memory;
- and
- signaling one of the access entities from a first access entity at the head of the linked list after the first access entity is finished accessing the data structure.
A processor comprising:
- a plurality of processing engines integrated within a single chip, each processing engine having at least one execution thread;
- and
- circuitry configured to
- store a first identifier in a first storage location, the first identifier identifying a data structure in a shared memory;
- store a second identifier in a second storage location associated with the first storage location, the second identifier identifying a first execution thread;
- store the second identifier for access by a second execution thread;
- and
- signal the first execution thread by the second execution thread, before the first execution thread accesses the data structure.
A processor comprising:
- a plurality of processing engines integrated within a single chip, each processing engine having at least one execution thread;
- and
- circuitry configured to
- store a linked list of values identifying execution threads waiting to access a data structure in a shared memory;
- and
- signal one of the execution threads from a first execution thread at the head of the linked list after the first execution thread is finished accessing the data structure.
A computer program product tangibly embodied on a computer readable medium, for managing access to shared memory by a plurality of access entities, comprising instructions for causing a computer to:
- store a first identifier in a first storage location, the first identifier identifying a data structure in the shared memory;
- store a second identifier in a second storage location associated with the first storage location, the second identifier identifying a first access entity;
- store the second identifier for access by a second access entity;
- and
- signal the first access entity by the second access entity, before the first access entity accesses the data structure.
A computer program product tangibly embodied on a computer readable medium, for managing access to shared memory by a plurality of access entities, comprising instructions for causing a computer to:
- store a linked list of values identifying access entities waiting to access a data structure in the shared memory;
- and
- signal one of the access entities from a first access entity at the head of the linked list after the first access entity is finished accessing the data structure.
A system comprising:
- a network device including a shared memory for storing data packets;
- a processor in communication with the shared memory and configured to
- store a first identifier in a first storage location, the first identifier identifying a data structure in the shared memory;
- store a second identifier in a second storage location associated with the first storage location, the second identifier identifying a first access entity;
- store the second identifier for access by a second access entity;
- and
- signal the first access entity by the second access entity, before the first access entity accesses the data structure.
A system comprising:
- a network device including a shared memory for storing data packets;
- a processor in communication with the shared memory and configured to
- store a linked list of values identifying access entities waiting to access a data structure in the shared memory;
- and
- signal one of the access entities from a first access entity at the head of the linked list after the first access entity is finished accessing the data structure.
Dependencies are inferred from the claim text.